cancel
Showing results for 
Search instead for 
Did you mean: 

Single DMA in Dual regular simultaneous ADC mode: Only the master ADC value is saved in the buffer

GDuc.1
Associate

So I wanted to use a single DMA with the Dual regular simultaneous ADC mode on a NUCLEO-L476RG. However I noticed that just the master ADC value was present in the buffer of the DMA, even though the Data width of the DMA is set to Word.

After some investigation, I found that in the file stm32l4xx_hal_msp.c in the function HAL_ADC_MspInit, automatically generated by STMCubeMX:

hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;

Changing manually DMA_PDATAALIGN_HALFWORD to DMA_PDATAALIGN_WORD is working, but I wanted to know if there is an option in STMCubeMX to configure that ?

FYI here is the parameters I set in STMCubeMX v5.6.0-RC6:

  • ADC Master :

0693W000000VnExQAK.png

  • ADC Slave :

0693W000000VnF2QAK.png

  •  DMA :

0693W000000VnEYQA0.png

2 REPLIES 2
Khouloud ZEMMELI
ST Employee

Hello @GDuc.1​ ,

You just need to change the Data width to Word,

0693W000000VnruQAC.png

Best Regards,

Khouloud

Hi @GDuc.1​ 

PeriphDataAlignment generated in the code is none other than data width for peripferal.

MemDataAlignment data width for memory , configured from DMA table and not ADC

So, the answer is Yes, you can do the configuration from DMA table.

0693W000000Vns9QAC.png

Best regards,

Nesrine