HRTIM burst DMA
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‎2022-01-06 5:50 PM
Hi,
I am trying to figure out to make HRTIM burst DMA working. I want to update timer period, compare1, compare2, and compare 3 registers by using burst DMA. There is not much information about this. There are two postings in the community posted several years ago, and it gave me some idea. But I need to have more information.
- I used CubeMx to configure and generate code.
- I want to trigger the burst DMA by software.
- Assuming that the DMA source buffer data order matches to the order of number of registers to update, for there is no description stated in the reference manual.
- Nothing happens when I run. It did not stop at burst DMA completion and DMA error callback function when I set breakpoints.
Below screenshots and code are used for the configuration.
I am not sure that I need to check on the "Increment Address" or not.
InvPerComp[0] = new_per; // new period
InvPerComp[1] = cmp1; // new compare 1
InvPerComp[2] = cmp2; // new compare 2
InvPerComp[3] = cmp3; // new compare 3
// Will this update the registers in order?
HAL_HRTIM_BurstDMATransfer(hrtim, timer, (uint32_t)&InvPerComp[0], 4)
- Labels:
-
DMA
-
HRTIM
-
STM32CubeMX
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‎2022-03-03 3:07 AM
Did you find a solution to this problem? It would be interesting to know as I'm working on a similar problem.
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‎2023-11-14 7:03 AM
Did you find a solution to this problem? I have a similar problem.
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‎2023-12-19 8:55 AM
Hello @JRyu.1 , @BKain.2 , @MTall.3 ,
Here some support and points that may help you :
- Can you confirm you use HAL_HRTIM_BurstDMAConfig() to configure HRTIM burst DMA timer x update register (HRTIM_BDTxUPR) ? Please share register values before and after executing this line.
- Which STM32 are you using ?
- Can you please share the HAL_HRTIM_MspInit() content ? Have you enable synchronization ?
Best Regards,
Pierre
To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.
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‎2023-12-19 9:48 AM
Confirm that the source buffer used for DMA holds the correct data in the correct order for updating the timer period, compare1, compare2, and compare3 registers.
