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[L0] LCD VLCD: wrong documentation and code generation

SZano
Associate III

The datasheet (DS10685 Rev 6) in Table 16 says that the VLCD pins are:

PB0/LCD_VLCD3

PB2/LCD_VLCD2

PE11/LCD_VLCD1

PE12/LCD_VLCD3

PB12/LCD_VLCD1

In the reference manual RM0367 Rev 7 (for STM32L0x3)

Section 10.2.2 (SYSCFG_CFGR2), for bits LCD_CAPA:

Bit 1 controls the connection of VLCDrail1 on PB2/LCD_VLCD1

0: VLCDrail2 not connected to PB2/LCD_VLCD1

1: VLCDrail2 connected to PB2/LCD_VLCD1

Bit 2 controls the connection of VLCDrail1 on PB12

Bit 3 controls the connection of VLCDrail3 on PB0

Bit 4 controls the connection of VLCDrail1 on PE11

Bit 5 controls the connection of VLCDrail3 on PE12

So, the reference manual seems to be wrong about PB2.

The VLCD names are wrong in the schematics for STM32L073Z-EVAL too (document "MB1168.pdf" revision C-01): PB2 is marked as "VLCD1", and PE11 is marked as "VLCD2" (whereas PE12 is correctly marked as "VCLD3").

The actual voltages on the pins agree with the naming in the datasheet (PE11/LCD_VLCD1 < PB2/LCD_VLCD2 < PE12/LCD_VLCD3)

The options available in CubeMX fully agree with the datasheet (not the reference manual).

However, the code generation is partially wrong: the VLCD pins are properly configured as alternate-function GPIOs, but only some of them are also mentioned in the SYSCFG_CFGR2_LCDCAPA bits.

See the attached CubeMX project: in function MX_LCD_Init(), the following line is produced

__HAL_SYSCFG_VLCD_CAPA_CONFIG(SYSCFG_VLCD_PB0_EXT_CAPA_ON);

instead of

__HAL_SYSCFG_VLCD_CAPA_CONFIG(SYSCFG_VLCD_PB0_EXT_CAPA_ON|SYSCFG_VLCD_PB2_EXT_CAPA_ON|SYSCFG_VLCD_PE11_EXT_CAPA_ON);

1 ACCEPTED SOLUTION

Accepted Solutions
Amel NASRI
ST Employee

Hi @Community member​ ,

I confirm that the datasheet is the correct reference.

So, the following updates are required:

  1. Align LCD_CAPA description with datasheet and table 76 of the reference manual (VLCDrail connections to GPIO pins) (Internal ticket number 117513)
  2. Correct the VLCD names in STM32L073Z-EVAL schematic (Internal ticket number 117516)
  3. Fix the generated code with STM32CubeMX (Internal ticket number 117524)

I'll highlight these required updates to relevant teams and I'll keep you informed.

-Amel

PS: Internal tracking number is not accessible or usable by customers

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

View solution in original post

4 REPLIES 4
Amel NASRI
ST Employee

Hi @Community member​ ,

I confirm that the datasheet is the correct reference.

So, the following updates are required:

  1. Align LCD_CAPA description with datasheet and table 76 of the reference manual (VLCDrail connections to GPIO pins) (Internal ticket number 117513)
  2. Correct the VLCD names in STM32L073Z-EVAL schematic (Internal ticket number 117516)
  3. Fix the generated code with STM32CubeMX (Internal ticket number 117524)

I'll highlight these required updates to relevant teams and I'll keep you informed.

-Amel

PS: Internal tracking number is not accessible or usable by customers

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

Thank you.

Given the mistake in the eval schematic, the silkscreen is wrong too. I guess this is impractical to fix, though.

Sara BEN HADJ YAHYA
ST Employee

Hello  @Community member​ 

This issue is fixed in STM32CubeMX latest release.

V6.6.0 is now available under this Link.

Thanks for your contribution.

Sara.

KDJEM.1
ST Employee

Hello @SZano ,

The reference manual typo is fixed in RM0367 Rev 8.

Thank you.

Kaouthar

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.