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Does the DBANK bit should be activated while using firmware on one bank or firmware size over 256 KB ?

MAmem.1
Associate III

Hi everyone,

I have some misunderstanding about the use of the DBANK bit of the configuration bits.

I have a costomized SPI bootloader located at address 0x0800 0000 and an Application starting at 0x08005000. So both are located on the Bank1. 

I made the choice to use only a single bank on my MCU because I don't need dual bank neither for updating or for changing boot bank. It is also because of the firmware size that can exceed 256KB.

During a firmware update the new Application is read from an external SPI flash and during system boot the font characters and language are also read from the same external flash. After a successful update the SPI is deinitialized and initialized again in Application.

Now the Issue:

When the DBANK is unchecked the upgrade can be proceeded but when the bootloader jumps to the application, it seems the SPI bus is not working correctly. I have no characters displayed on the LCD. I have to power OFF and ON for the MCU to read the SPI flash, then the display is correct

When the DBANK is checked the upgrade can be proceeded and the MCU boots OK. All characters are displayed correctly.

So what is the influence of DBANK on the SPI or probably interrupt vector ?

NB: before both tests the MCU is erased and reprogrammed.

8 REPLIES 8
Piranha
Chief II

The bit is named nDBANK and means "not dual bank".

Claps :) No seriously ?

Isn't it faster to just open the reference manual and read it instead of writing detailed posts and waiting for someone? It takes few minutes!

MAmem.1
Associate III

Hi Piranha, If you can point the location of the effect of the nDBANK bit on the behavior of the SPI, just let me know the page, I'll take it. I wrote a detailed post to explain, to potential HELPER, the issue I'm facing, not just for correcting the syntax of the DBANK bit. I'm pretty sure that you didn't even pay attention to my issue. ;)

FBL
ST Employee

Hello @MAmem.1​,

Could you check whether your interruptions are working when the issue comes up? How do you jump to external flash? Is it through a reset or with calling the address?

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MAmem.1
Associate III

Hello @F.Belaid​ 

SPI is not working in interruption mode. It works in blocking mode with timeout.

In bootloader the program can read from external flash through SPI and update the firmware. Atfer update is over the bootloader jumps to the Application without reboot/reset.

     /* Jump to user application */

      JumpAddress = *(__IO Uint32*) (APPLICATION_ADDRESS_START + 4);

      Jump_To_Application = (pFunction) JumpAddress;

      /* Initialize user application's Stack Pointer */

      __set_MSP(*(__IO Uint32*) APPLICATION_ADDRESS_START);  

     

      SCB->VTOR = 0x08000000 | 0x5000;

      /* Jump to application */

      Jump_To_Application();

Hi @MAmem.1​,

I can't see any issue. I suggest you to take a look at AN2606 section 4.1 Bootloader activation. It might help.

0693W00000Y85JoQAJ.png

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Piranha
Chief II

The DBANK vs nDBANK is not just a syntax - the "not" has a functional meaning. But the confusion came from a fact that you didn't mention your MCU. Both me and @F.Belaid​ took it as an F7, which has an nDBANK bit, but it looks like you are using a G4, which indeed has a non-inverted DBANK bit.

Anyway, the important point is that the bank mode cannot be changed without the respective changes in code. While the FLASH address range is the same in both modes and most of the functionality should work, at least the FLASH erase code will not, because the FLASH page size and numbers are different. Therefore, if your bootloader erase code is for one mode, in the other mode part of the erase and consequentially also the programming operations will fail and the firmware image in FLASH will be corrupted. Look at RM0440 tables 7 and 8. Ensure that your page number calculation and erase code is correct for the required bank mode.