Writing to memory beyond devices listed memory size, STM32G071GB (128K) vs STM32G071G8 (64K)

[JBlackann]

Hello,

I have an application where originally the STM32G071GB (128K) was designed in. Unfortunately there was no available stock of the STM32G071GB (128K). Compiling our code was slightly over the 64K when no optimization was used. Enabling optimization dropped the code size under the 64K size ( I believe it was around 57K). In looking for possibly solutions we found the STM32G071G8 (64K). The STM32G071G8 has the same pinout and matches that of the STM32G071GB just that it has 64K in stead of 128K. We have received some units in and have done some testing. When we were investigating the legacy code, we found that the previous developer was writing to the flash page at address offset of 1C800. When we used a STM32G071G8 (64K), the device seems to write to this address offset of 1C800 and is able to read it back as necessary. I was able to look at the values at the address using STM32CubeProgrammer.

Does anyone else have experience with attempting to write to an address listed beyond what the part supposedly has? In my case, writing to an address greater than 64K but less than 128K. Given some time, I think it would be best to just save this information to an external EEPROM which is used on the board. Not sure why the previous developer didn't do it in the first place.

Please let me know your thoughts.

[waclawek.jan · Accepted solution]

ST (and every mcu manufacturer) does not make various memory options of the same design as distinct silicon die. They simply don't test a portion of the memory when manufacturing it, as that's a time consuming thus relatively expensive step. So, the FLASH is physically present in the chip, but it's not guaranteed to work properly beyond the quoted capacity.

JW

[Kraal]

Hi,

I would say that for a commercial product, use only the amount of memory that is guaranteed to be in the chip. The "bonus" memory might work well on your bench or even in your customer product, but it can/will fail in an unpredicted manner, and that will be hard to debug and even more to explain to your customer.

Best regards.

[Andreas Bolsch]

For most STM32, the flash size limit of the "trimmed" variants ist not enforced, but only the flash size register is programmed according to the advertized size. Except for the G0Bx/Cx: in G0B1CC only the advertized 256kBytes are directly accessible, although it's possible the reach the "hidden" extra flash by playing with option bytes.

Hence for the future be prepared that ST might and probably will make the extra flash inaccessible.