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Why does AN5050 say PSRAM not supported on STM32L4Rxxx?

Forum|Forum|6 years ago
August 8, 2020
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I'd like to use the STM32L4R9ZG microcontroller along with a HyperRAM memory such as the ISSI IS66WVH8M8BLL. I was reading through the ST application note AN5050 "Octo-SPI interface on STM32 microcontrollers" to familiarize myself with the process. On page six of the app note there is a table called "Table 2. OCTOSPI main features". There is a note associated with this table saying PSRAM is not supported with STM32L4Rxxx. What does this mean? PSRAM is clearly supported with these devices because the STM32L4R9I-EVAL board even has a PSRAM on it. Can someone please explain this to me?

Thanks!

Rob

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Best answer by Alex - APMemory

Fyi, the STM32L4R9 has limitation in driving Octo SPI RAM (described in STM errata sheet). Using APMemory OPI (APS6408L-OBM-BA) is slightly better, but still with many limitations. So the most recommended external memory option for this specific MCU version would be to use ADMUX PSRAM (for example APS12816G…) or SDRAM (for example A3V64S40GTP) using the FMC controller rather than the OPI memory controller.

Alex

Super User

That PSRAM on EVAL board, is it connected through FMC out OCTOSPI?

JW

RKochAuthor

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Hi JW,

Thanks for your response. On closer inspection you're correct - the PSRAM seems to be connected to the FMC on the STM32L4R9I-EVAL board. I dont actually own this eval board, just referencing the schematics online and guess I didnt take a close enough look.

My original post referenced the ISSI IS66WVH8M8BLL, which was a bad example. What I'm really wondering is whether I can connect a HyperRAM device to the HyperBus on the STM32L4R9ZG. All indications would suggest I can, except the AN5050 application note threw me because of the note saying PSRAM is not supported on this device. So my original question still stands - is it possible to connect HyperRAM to the HyperBus on this STM32?

Thanks again,

Rob

Lead III

I'd guess the problem is a confusion regarding the term 'PSRAM', which actually refers to the memory cells (dynamic RAM with self-refresh), not to the interface. But in the past, PSRAM usually meant parallel interface (maybe with multiplexed address/data), see errata sheet. UM2248 says more precisely:

"9.25 Octo-SPI DRAM device

IS66WVH8M8BLL-100BLI, a 64-Mbit self-refresh dynamic RAM (DRAM) device with a

HyperBus interface, is fitted on the STM32L4R9I-EVAL main board, in U5 position. It allows

evaluating STM32L4R9AII6 Octo-SPI interface."

So, here the confusion does not arise, as "self-refresh dynamic RAM" is not contracted to "PSRAM".

There is still a restriction on the R/S series, as they don't have differential clock, so the 1.8V device is not supported.

Alex - APMemoryBest answer

Associate II

Fyi, the STM32L4R9 has limitation in driving Octo SPI RAM (described in STM errata sheet). Using APMemory OPI (APS6408L-OBM-BA) is slightly better, but still with many limitations. So the most recommended external memory option for this specific MCU version would be to use ADMUX PSRAM (for example APS12816G…) or SDRAM (for example A3V64S40GTP) using the FMC controller rather than the OPI memory controller.

Alex

Associate II

Dear @Community member, thank you for your relevant question.

Dear @Alex - APMemory , thank you for your answer which is a helpful one, except the detail regarding the "Octo SPI RAM" it is actually "Octo SPI PSRAM" instead.

We can confirm that due to some limitations impacting the OCTOSPI-PSRAM memories , the OCTOSPI-PSRAM memories (including HyperRAMs) are not supported in the STM32L4R/Sxxx products.

Please have a look at the STM32L4Rxxx / STM32L4Sxxx errata sheet, more specifically on the 2.7.22 section.

We recommend you to use Parallel PSRAM memories with FMC or to switch, if possible, to a STM32L4P/Qxxx product which supports OCTOSPI PSRAM memories.

You can also check the Table 119. OCTOSPI implementation in the STM32L4+ Reference Manual (RM0432).

We hope that we have helped you figure out the answer to your inquiry.

Alex - APMemory

Associate II

You are right "Octo SPI PSRAM" is more correct than "Octo SPI RAM"

Actually the STM32L4P/Qxxx is a good candidate and example which support not only Octo SPI PSRAM, but also Quad SPI PSRAM (as validated on Disco Kit with BGA24 & SOP8 foot print - section 6.11 Octo-SPI device at https://www.st.com/resource/en/user_manual/dm00665471-discovery-kit-with-stm32l4p5ag-mcu-stmicroelectronics.pdf). This provides a wide range of options from lowest 16Mb density / 6 Signal pin / simple SOP8 up to 512Mb density / 11 signal pin / BGA24 for highest Bandwitht

Alex