Hello, thank you for reading this post, sincerely hope to help answer questions.
The OSPI interface of STM32H735IGK6 is used to connect ISSI66WVO32M8DBLL to ISSI's PSRAM, which can read and write registers but cannot read and write memory. When configuring the register, it is found that the 24-26-bit MTYP[2:0]:Memory Type in the OCTOSPI device configuration register 1 (OCTOSPI_DCR1) register is controversial. According to the description in the manual, the MTYP[2:0] is shown in Figure 1, while the configurable options in cubemx are shown in Figure 2. Both have bias; Moreover, the following paragraph was found in file AN5050 which did not indicate that the general OSPI interface supports ISSI's PSRAM, please see Figure 3 below, so I would like to confirm whether STM32H7 supports ISSI's PSRAM (the general OSPI interface protocol is not hyperbus).If supported, what mode should this option (memory type) select? Thanks for your answer.
Figure 1
Figure 2
Figure 3
Hello @Lin_Yishan ,
Thank you for sharing, I looked at the data ordering in ISSI memory datasheet and I figured it is compatible with Macronix RAM.
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Thank you.
Kaouthar
Thank you for your reply.Modify according to the method you gave, but the problem is still not solved,sincerely hope to help answer questions:
The thing is that I use the OSPI2 interface of the STM32H735 to connect to the ISS66WVO32M8DBLL and use indirect mode for memory reading and writing.
1、The first step is to use cubemx to configure OSPI interface parameters as shown in the following figure:
2、The second step is to define the data read and write command parameters with OSPI_RegularCmdTypeDef:
1.here the write data is 32 bytes and the data is printed out through the serial port
2.here read the 32 bytes of data written above
3.The following are the address and instruction parameters for the call, as defined by ISS66WVO32M8DBLL:
Use wrap burst mode
3、I have a few things to add about ISS66WVO32M8DBLL
1.DQSM operates as a data mask when data is written to memory；
2.DQSM acts as the data synchronization clock when data/registers are read；
1.Default value: 1111 0000 0010 0010 :0xf022
2.CR[3] Initial Access Latency: When used in conjunction with Latency counter, the multiple of Latency counter is determined. When this bit is 0, the multiple is determined according to whether there is Refresh Collision (Refresh collision means that a read or write operation is performed at the same time during a refresh operation, which may result in performance issues or data errors). Decide that if there is a refresh conflict, it will be twice, and if there is no refresh conflict, it will be 1 times. When this bit is 1, it is fixed to double.
4、The third step, call the above function, the address and data passed in, but the actual print results, read the data is wrong:
The above code is to write 32 bytes of data to memory, read it into the array, and print it out through the serial tool.
The results are as follows:
Without changing the memory type (originally AP Memory), the register reads correctly but the memory reads and writes incorrectly,
and after changing to Macronix RAM, the register reads and writes incorrectly:
I think there may be an error in the register configuration, hope you can answer the doubts, thank you very much!
I will provide my code.
