STM32G431 Comparator BUG

[Michal Dudka]

Hi,

Few days ago i've encountered a strange behavior of the comparator at STM32G4. I investigated the problem under controlled conditions (used Nuclo kit instead application PCB) and the result is startling.

Comparator 4 configured to get positive input from pin PB0, negative from DAC1 Channel 1 (set to 500mV).
Hysteresis set to maximum (70mV)
DAC output is not connected to external pin (only internal connection)
Input signal is 50Hz sinewave with 400mV amplitude and 600mV offset (to reliably cross 500mV thresholds +- hysteresis)
Enabled Comparator 4 rising edge interrupt.
Interrupt routine simply generates fixed length pulse.

On blue scope trace you can see clean input signal (scope input AC coupled), it certainly does not contain noise that would be close to hysteresis value (more detail at last screen).
On Red trace is application output. You can see that many times interrupt fires also on falling edge, or fires multiple times on tha same rising edge. It looks like that comparator works withou hysteresis. But if you take a look on next screenshot, you will se comparator HW output (yellow) witch marked thresholds. They are separated by about 40mV which corresponds to "typical" value of "70mV" hysteresis. And of course, comparator registers are correctly set to hysteresis level "7".
On yellow trace is comparator HW output (PB6)
Last screenshot shows that there is not excesive noise to "false" trigger comparator.

False falling edge detectionDouble rising edge detectionHysteresis provedSmall noise

I am using STM32G431K Nucleo board, MCU clocked 170MHz from internal oscillator, powered from USB.
Source code included.

[Simon V. · Accepted solution]

Hello Michal,

What you are observing may be relative to the Miller effect inside the comparator circuitry.

Would it be possible for you to set bit#1 (not documented) in COMP_CxCSR, it enables a compare feature which hold the comparator output during the duration of the Miller effect.

On my side, using your setup and a nucleo board, I was able to hold the comparator output during the falling phase and obtain the expected behavior. 

Regards,

Simon

[Michal Dudka]

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@Simon V. wrote:

Would it be possible for you to set bit#1 (not documented) in COMP_CxCSR, it enables a compare feature which hold the comparator output during the duration of the Miller effect.

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Thanks Simon,
It works, artefact dissapears, and comparator works as expected. May be you should mention that in user manual.

BTW: Did you tested Nucleo32 (STM32G431KB) or bigger Nucleo64 (STM32G431RB) ? I've observed this effect on two different PCBs (Nucleo32 and my PCB), both with STM32G431KB.