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STM32F072V8T6 capacitance and rise time of for I2C

murali
Associate III

I want to know the Bus capacitance and Rise time of STM32F072V8T6 for I2C Calculation, Anyone who has know kindly tell me. Thank you. 

6 REPLIES 6
Andrew Neil
Evangelist III

The capacitance of the bus, as the name suggests,  is defined by the whole bus - not just the microcontroller!

IO pin capacitance will be in the chip's Datasheet - under electrical characteristics:

AndrewNeil_0-1706694834923.png

The following pages give further AC characteristics

See also:

AndrewNeil_1-1706695014238.png


@murali wrote:

 and Rise time . 


Again, that is defined by the external bus - not the microcontroller.

Specifically, it is defined by your pull-up resistors.

See this post: 

https://electronics.stackexchange.com/questions/1849/is-there-a-correct-resistance-value-for-i2c-pull-up-resistors/473799#473799

It contains this diagram - which shows you the effect of the pullup value:

 
 

AndrewNeil_4-1706695333035.png

 

Thank you

Hi Andrew Neil,

 

                  Would you inform me of the Hold time of SDA? I want to configure with LT8491 IC of which hole time is at least 300 ns needed.  

The hold time should be at least half a clock cycle (after a rising edge of I2C SCK I2C SDA remains stable: SDA can only change when SCK is low...).

The bits on SDA changes when SCK is low and should be stable for at least half-a-clock period of SCK (to the next falling edge, if SCK is high: SDA should never change: except for START and STOP).

Hold Time is not really so important (it should be guaranteed by I2C device in MCU, it is hold for a half-clock cycle): a "Setup time" could be more interesting (how long before an SCK edge is SDA already stable).

BTW:

as mentioned by Andrew Neil: the capacitance comes from:

  • your I2C cable, the PCB traces, to connect I2C devices
  • and the (external) I2C devices itself (each contributes with a capacitance due to its input - see the datasheet of the external I2C chips you are using)

The "Raise Time" is now a function of this:

  • what is the drive strength, speed settings... for the MCU I2C master signal pins?
  • how many I2C slaves ("capacitors") are connected, how long and how good is the cable?

Also, to bear in mind:

  • I2C needs a pull-up (because all is Open Drain logic)
  • the "Raise Time" is very different: if pulling the signal low (defined by MCU pin characteristics, like speed, drive strength, slew rate...) vs. "releasing" the signal to high: now a function of the pull-up resistor!
  • if you talk about "Raise Time" as "transition from low to high": all related to pull-up, nothing on MCU pin side to control!

The "rule" is:

  • the more I2C slaves are connected on I2C bus - the lower the pull-up resistor has to be
  • the faster the speed on I2C (100 KHz vs. 1 MHz) - the lower the pull-up resistor has to be

When you say "Raise Time" which sounds to me as: "how fast are the signals (both: SCK and SDA) going back from low to high - this is only a function of you pull-up vs. the number of I2C slaves ("capacitors", plus cable). There is nothing on MCU which could control/set the "Raise Time"!

"Rise Time" means specifically the time it takes the bus to rise from the low level to the high level.
This is controlled by the pullups - not the drivers.

"Fall Time", conversely, means the time it takes the bus to fall from the high level to the low level.
This is controlled by the drivers.

AndrewNeil_0-1706781148035.png

 

I totally agree with you. Nice explanation (for the OP).
He has mentioned "hold time" in one reply: a completely different topic.
Nothing to add: also very clearly to see the effect of a pull-up (raise time) vs. Open Drain sink for fall time.

A very great picture! (explaining the importance to have the right pull-up values).