STM32 for high resolution delays

[ElecDesigner]

Is it possible to use a STM32 for something like the following:

Take in a pulse, interrupting on a edge.

Use this edge to generate multiple (5 or so) output pulses (only the positive edge timing needs tightly controlled timing). The output pulses might need to happen almost instantaneously or delayed by up to a few ms with say a 10us resolution - set by variables that can be set on another interface.

Not experienced with these device and not sure if the timers are precise enough, just looking for some ball park suggestions. There appears to be a family of devices with high resolution timers (for digital power controllers e.g. STM32F334K) so I'm thinking they might be suitable.

[Muhammed Güler]

You can review the N-pulse waveform generation part of the document here.

https://www.st.com/resource/en/application_note/dm00236305-generalpurpose-timer-cookbook-for-stm32-microcontrollers-stmicroelectronics.pdf

[ElecDesigner]

What I should have mentioned is that the output pulses need to be on different pins - one pulse per pin.

[waclawek.jan]

STM32 timers run out of APB clocks which frequencies can go up to tens of MHz, so 10us timing is no issue with standard STM32 timers.

Get any STM32 - e.g. a Nucleo board - read the timer chapter in RM, connect input to CH1, set up any timer in One-Pulse mode in TIMx_CR1, slave-mode controller set up in TIMx_SMCR in Trigger mode, triggered by CH1 set to Input Capture mode in TIMx_CCMR; set CH2 to Output Compare, any PWM mode in TIMx_CCMRx and enable it in TIMx_CCER, assign a pin to CH2 in GPIO (set as AF in GPIO_MODER), set TIMx_CCR2 to required delay and TIMx_ARR to value larger than TIMx_CCR2 determining the pulse duration.

For more inputs use CH3 and CH4 of the same timer (ARR determines the trailing edge of all pulses of a single timer); for even more inputs of more flexibility in pulse duration either use more timers with CH1 all connected in parallel externally, or learn to chain them using the TRGO/TRGI mechanism internally.

JW