STM32 core peripheral register regions: NVIC appears twice ?
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‎2022-12-01 8:15 AM - last edited on ‎2025-01-21 12:53 AM by Andrew Neil
PM0056, Rev 6, page 105, Table 33. STM32 core peripheral register regions,
Nested vectored interrupt controller;
twice ?
0xE000E100-0xE000E4EF Nested vectored interrupt controller
0xE000EF00-0xE000EF03 Nested vectored interrupt controller
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‎2022-12-02 7:11 AM
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‎2022-12-02 7:11 AM
JW
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‎2022-12-05 6:10 AM
Hello @placidity.master_gmail.com​,
As already answer by @Community member, the block address of the main NVIC register (ISER, ICER, ISPR ICPR IABR and IPR) is 0xE000E100-0xE000E4EF.
The NVIC_STIR register is located in a separate block at 0xE000EF00.​
Thank you.
Kaouthar
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