SPI - role of the NSS signal?

[pass3master]

This is a question about SPI communication.
There is an NSS pin for SPI communication, but is it okay to use GPIO instead of the NSS pin when there is one master and one slave?
We don't quite understand the role of NSS. I think it will be useful when there is one master and many slaves.

[Andrew Neil]

Rather than saying, "this is a question about X", please give more descriptive titles.

eg, here, rather than just "This is a question about SPI", which tells little, saying "Role of NSS in SPI" is more helpful in showing exactly what your question is about.

I've edited it for you.

Please see the posting tips: 

https://community.st.com/t5/community-guidelines/how-to-write-your-question-to-maximize-your-chances-to-find-a/ta-p/575228

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@pass3master wrote:

We don't quite understand the role of NSS. I think it will be useful when there is one master and many slaves.

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Yes, that is the key role of NSS.

But, even if there is only one slave, NSS helps to provide synchronisation between slave and master.

Many (most?) slaves require to see a falling edge to mark the start of communication, and a rising edge to mark the end.

With the STM32, you can choose to have the SPI function manage NSS for you, or you can do it "manually" by toggling any GPIO pin.

EDIT:

Note that sometimes the built-in automatic operation of the NSS signal in the STM32's SPI function is not correct for use as a slave-select; eg, see:

https://community.st.com/t5/stm32-mcus-products/chip-select-of-spi-in-nucleo-f401re-stuck-low/m-p/721529

So, in that case, you would have to do it "manually"

[pass3master]

My apologies for the title.
Thank you for pointing that out.

We know it's possible to programmatically toggle GPIO pins and "manually" manage them, but are there any examples of how to do this using NSS?

[Andrew Neil]

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@pass3master wrote:

We know it's possible to programmatically toggle GPIO pins and "manually" manage them, but are there any examples of how to do this using NSS?

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Not sure I get what you're asking here?

When you're managing it "manually", it's just like setting any other GPIO high and low - so you just do that!

In your .ioc file (CubeMX project) disable the Hardware NSS:

EDIT:

Maybe this helps:

https://community.st.com/t5/stm32-mcus-products/0-is-added-in-the-front-of-my-message-when-using-hal-spi-receive/m-p/722151/highlight/true#M261323

[TDK]

On the STM32F4 SPI, the NSS pin is always low. This is a common complaint but that's just how the hardware was made. If your slave requires something different, you will need to set it as GPIO output and toggle manually. It is okay to do this.

On newer families, the NSS pin can behave how you want, with it going low while the clock is active and high afterwards. This can be useful when there is only one slave, but doesn't help at all when multiple slaves are present.