Chip Select of SPI in Nucleo F401RE stuck low

[FAJOL.1]

Hi guys,

I m having an issue with my Nucleo F401RE. I m porting a code based on the use of SPI2 that worked very well on Nucleo G431RB. I made same setting on Nucleo IDE (see picture).

After inizialization of periperhals NSS (Chip Select) goes to high and everithing seems to work fine until the first transmission:

void SPI_TX_16b(uint8_t* pdata){

	HAL_SPI_Transmit(&hspi2, (uint8_t*) pdata, 1, HAL_MAX_DELAY);

};

Then the NSS goes down and stucked there forever. In the picture (yellow is clk, green is data out, and violet is nss). 

Any ideas?

Thanks

[TDK · Accepted solution]

Don't use the hardware NSS pin on the STM32F4, it's not driven like a CS pin. It will always be low when the peripheral is active. Instead, initialize it as a GPIO output and manually set it low before transmission, and high afterwards.

[FAJOL.1]

ok fine. 

But why the IDE mentions "hardware NSS output signal" if Chip select is not automatically managed? In G431RB used to work automatically

Thanks

[TDK]

Different chips have different SPI peripherals and they behave differently. This is how it behaves on the STM32F4.

Why? Who knows, but newer chips behave differently so it feels like they recognized the issue. Just what it is. Keeping CS low is sometimes not a problem.

[FAJOL.1]

They shoud change IDE SW setting maybe. Thanks

[Andrew Neil]

The behaviour of the  "hardware NSS output signal" is described in the Reference Manual:

https://www.st.com/resource/en/reference_manual/rm0368-stm32f401xbc-and-stm32f401xde-advanced-armbased-32bit-mcus-stmicroelectronics.pdf#page=562 

Indeed, that doesn't sound like a very useful behaviour - but it is the defined behaviour.

https://www.st.com/resource/en/reference_manual/rm0368-stm32f401xbc-and-stm32f401xde-advanced-armbased-32bit-mcus-stmicroelectronics.pdf#page=563 

[FAJOL.1]

Unfortunally it doesn t work as described in the Reference Manual. I have to add manual CS meaning that I have to add layer of software (simple modification) over the HAL. 

[Andrew Neil]

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@FAJOL.1 wrote:

Unfortunally it doesn t work as described in the Reference Manual.

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Doesn't it?

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@FAJOL.1 wrote:

Then the NSS goes down and stucked there forever

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That is the behaviour described in the UM:

So, if you want it to release NSS (from the low state), you need to disable the SPI.