2024-07-04 12:38 AM - edited 2024-07-04 01:22 AM
hi
1. STM32F722ZE & Winbond SDRAM is working fine with follow setting .
W9825G6KH-6I 166MHz/CL3 or 133MHz/CL2
CASLatency = FMC_SDRAM_CAS_LATENCY_3;
SDClockPeriod = FMC_SDRAM_CLOCK_PERIOD_3;
my understanding was MCU main clock was divide by 2 is made on below .
Initially i kept the SDClockPeriod = FMC_SDRAM_CLOCK_PERIOD_2; but it's not working then i changed to SDClockPeriod = FMC_SDRAM_CLOCK_PERIOD_3; and then it's started working .
i). what is exact speed now SDRAM is working 108Mhz or 72Mhz ?.
ii). Initially i calculated the timing by 216Mhz/2 = 108Mhz = 9.26ns . should i need change the timing according to 72Mhz .??
iii) what is role of 166MHz/CL3 or 133MHz/CL2 ??.
2. SDRAM is working perfectly by HAL_SDRAM _read.
How to handle SDRAM by DMA access specifically DMA _Read .
#define SDRAM_ADD_1 0xC0000000
#define SDRAM_ADD_2 0xC0000060
i). i enabled the DMA mem to mem with word (source and destination )and then started DMA by below .
HAL_DMA_Start(&hdma_memtomem_dma2_stream0, (uint32_t)SDRAM_ADD_1, (uint32_t)rdata,10);
HAL_DMA_Start(&hdma_memtomem_dma2_stream1, (uint32_t)SDRAM_ADD_2, (uint32_t)rdata,10);
accessed DMA by
HAL_SDRAM_Read_DMA(&hsdram1, (uint32_t*)SDRAM_ADD_1, (uint32_t*)rdata, 10);
HAL_Delay(1000);
HAL_SDRAM_Read_DMA(&hsdram1, (uint32_t*)SDRAM_ADD_2, (uint32_t*)rdata, 10);
but stream0 is not working from address 1
stream1 is not working from address 2 .
i need access the SDRAM address randomly , so i need change the HAL_DMA_Start every time ?.
i think i am not approaching DMA properly . please suggest me how to approach SDRAM - DMA_Read with random address access