QSPI NOR Flash: can write data but can't read from it

[Naresh_]

Hi 

i am using stm32f767IGK6 i am able to write data in nor flash but  can't read  data of same address.

by use this APIs HAL_QSPI_Transmit(), HAL_QSPI_Receive()

Regard & Thanks,

Naresh 

[KDJEM.1]

Hello @Naresh_ ,

Could you please give more detail about the issue.

Are you read data in memory mapped mode or indirect mode?

Could you please take a look at the errata sheet precisely:

• 2.4.2 Wrong data from memory-mapped read after an indirect mode operation
• 2.4.4 Memory-mapped access in indirect mode clearing QUADSPI_AR register

May QSPI_ReadWrite_IT this example can help you.

Thank you.

Kaouthar

[Tesla DeLorean]

Your presentation of the problem and the context is inadequate.  Try harder as if you're explaining to someone who's not physically watching you code and test the issue.

[Naresh_]

Hi ,

Now i am able to Read  Manufacturer ID and the Device ID Nor flash by using below code 

s_command.InstructionMode = QSPI_INSTRUCTION_1_LINE;

 s_command.Instruction = S25FL128S_READ_ID_CMD;//0x90 or 0x9f

 s_command.Address = QSPI_ADDRESS_NONE;

 s_command.AddressMode = QSPI_ADDRESS_NONE;

 s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;

 s_command.DataMode = QSPI_DATA_1_LINE;

 s_command.NbData = 3;

 s_command.DummyCycles = 0;

 s_command.DdrMode = QSPI_DDR_MODE_DISABLE;

 s_command.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;



/* Configure the command */

if (HAL_QSPI_Command(Ctx, &s_command, HAL_QSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)

 {

return S25FL128S_ERROR;

 }

/* Reception of the data */

if (HAL_QSPI_Receive(Ctx, ID, HAL_QSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)

 {

return S25FL128S_ERROR;

 }

  when i am trying read nor flash then based data lines it change data like 255, 81.. as below showing code 

s_command.AddressSize       = QSPI_ADDRESS_32_BITS;
	  s_command.Address           = ReadAddr;
	  s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
	  s_command.NbData            = Size;
	  s_command.DdrMode           = QSPI_DDR_MODE_DISABLE;
	  s_command.SIOOMode          = QSPI_SIOO_INST_EVERY_CMD;

	  /* Configure the command */
	  if (HAL_QSPI_Command(Ctx, &s_command, HAL_QSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
	  {
	    return S25FL128S_ERROR;
	  }

	  /* Reception of the data */
	  if (HAL_QSPI_Receive(Ctx, pData, HAL_QSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
	  {
	    return S25FL128S_ERROR;
}

when i trying to write enable and  write then it is not working can please help 

i send instruction is 0x6 for write enable then it send error at this API's is HAL_QSPI_AutoPolling() time issue

QSPI_CommandTypeDef     s_command;
  QSPI_AutoPollingTypeDef s_config;

  UNUSED(Mode); /* The command Write Enable is always 1-0-0 */

  /* Enable write operations */
  s_command.InstructionMode   = QSPI_INSTRUCTION_1_LINE;
  s_command.Instruction       = S25FL128S_WRITE_ENABLE_CMD;
  s_command.Address          = QSPI_ADDRESS_NONE;
  s_command.AddressMode       = QSPI_ADDRESS_NONE;
  s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
  s_command.DataMode          = QSPI_DATA_1_LINE;    // changed to 0 data to l data line
  s_command.DummyCycles       = 0;
  s_command.DdrMode           = QSPI_DDR_MODE_DISABLE;
  s_command.SIOOMode          = QSPI_SIOO_INST_EVERY_CMD;

  if (HAL_QSPI_Command(Ctx, &s_command, HAL_QSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
  {
    return S25FL128S_ERROR;
  }

  /* Configure automatic polling mode to wait for write enabling */
  s_config.Match           = S25FL128S_SR1_WREN;
  s_config.Mask            = S25FL128S_SR1_WREN;
  //s_config.MatchMode       = QSPI_MATCH_MODE_AND;
  s_config.MatchMode       = QSPI_MATCH_MODE_OR;
  s_config.StatusBytesSize = 1;
  //s_config.Interval        = 0x10;
  s_config.Interval        = 0xFF;
  s_config.AutomaticStop   = QSPI_AUTOMATIC_STOP_ENABLE;
  s_command.Instruction    = S25FL128S_READ_STATUS_REG1_CMD;
  s_command.DataMode       = QSPI_DATA_1_LINE;

  if (HAL_QSPI_AutoPolling(Ctx, &s_command, &s_config, HAL_QSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
  {
    return S25FL128S_ERROR;
  }




HAL_StatusTypeDef HAL_QSPI_AutoPolling(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg, uint32_t Timeout)
{
  HAL_StatusTypeDef status;
  uint32_t tickstart = HAL_GetTick();

  /* Check the parameters */
  assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode));
  if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE)
  {
    assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction));
  }

  assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode));
  if (cmd->AddressMode != QSPI_ADDRESS_NONE)
  {
    assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize));
  }

  assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode));
  if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
  {
    assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize));
  }

  assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles));
  assert_param(IS_QSPI_DATA_MODE(cmd->DataMode));

  assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode));
  assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle));
  assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode));

  assert_param(IS_QSPI_INTERVAL(cfg->Interval));
  assert_param(IS_QSPI_STATUS_BYTES_SIZE(cfg->StatusBytesSize));
  assert_param(IS_QSPI_MATCH_MODE(cfg->MatchMode));

  /* Process locked */
  __HAL_LOCK(hqspi);

  if(hqspi->State == HAL_QSPI_STATE_READY)
  {
    hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;

    /* Update state */
    hqspi->State = HAL_QSPI_STATE_BUSY_AUTO_POLLING;

    /* Wait till BUSY flag reset */
    status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, tickstart, Timeout);

    if (status == HAL_OK)
    {
      /* Configure QSPI: PSMAR register with the status match value */
      WRITE_REG(hqspi->Instance->PSMAR, cfg->Match);

      /* Configure QSPI: PSMKR register with the status mask value */
      WRITE_REG(hqspi->Instance->PSMKR, cfg->Mask);

      /* Configure QSPI: PIR register with the interval value */
      WRITE_REG(hqspi->Instance->PIR, cfg->Interval);

      /* Configure QSPI: CR register with Match mode and Automatic stop enabled
      (otherwise there will be an infinite loop in blocking mode) */
      MODIFY_REG(hqspi->Instance->CR, (QUADSPI_CR_PMM | QUADSPI_CR_APMS),
               (cfg->MatchMode | QSPI_AUTOMATIC_STOP_ENABLE));

      /* Call the configuration function */
      cmd->NbData = cfg->StatusBytesSize;
      QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_AUTO_POLLING);

      /* Wait until SM flag is set to go back in idle state ***** */
      status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_SM, SET, tickstart, Timeout);

      if (status == HAL_OK)
      {
        __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_SM);

        /* Update state */
        hqspi->State = HAL_QSPI_STATE_READY;
      }
    }
  }
  else
  {
    status = HAL_BUSY;
  }

  /* Process unlocked */
  __HAL_UNLOCK(hqspi);

  /* Return function status */
  return status;
}

status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_SM, SET, tickstart, Timeout); i am fail to check the status register of nor flash. 

how to do write_enable , write operation in nor flash?

Regards & Thanks,

Naresh