PM0056, Rev 6, page 105, Table 33. STM32 core peripheral register regions, Nested vectored interrupt controller; twice ?

[placidity.master_gmail.com]

PM0056, Rev 6, page 105, Table 33. STM32 core peripheral register regions,

Nested vectored interrupt controller;

twice ?

0xE000E100-0xE000E4EF Nested vectored interrupt controller

0xE000EF00-0xE000EF03 Nested vectored interrupt controller

[waclawek.jan · Accepted solution]

JW

[KDJEM.1]

Hello @placidity.master_gmail.com​,

As already answer by @Community member, the block address of the main NVIC register (ISER, ICER, ISPR ICPR IABR and IPR) is 0xE000E100-0xE000E4EF.

The NVIC_STIR register is located in a separate block at 0xE000EF00.​ 

Thank you.

Kaouthar