Migrate from STMF4 to STM32F7 (configuration of memory mapping and bootloader)
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‎2017-06-02 12:41 AM
Hello ,
I'm a trainee and my project is to migrate from stmf4xx to stm32f7xx , so i was compile the all project using stmf7xx library on keil uvison 5 ,and fix all error due to incompatibility of these two microcontroller , and fix error of bitbanding because a stm32f7xx don't support a bitbanding instructions , now we should modify a memory mapping and bootloader , please help , i don't now how i can do it .
Regards
Youssef
#migrate-from-stmf4-to-stm32f7(configuration-bootloader) #migrate-from-stmf4-to-stm32f7 #migrate-from-stmf4-to-stm32f7-(configuration-of-memory)- Labels:
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STM32F7 Series
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‎2017-06-05 3:06 PM
Hi
youssef.elmzaiti
,Please refer to the following documents that can help you on your project migration:
- Application note Migration of microcontroller applications from STM32F42xxx/F43xxx devices to STM32F7 Series devices (section1.3 System bootloader -2.2 Memory mapping)
- STM32 microcontroller system memory boot mode
Imen
Thanks
Imen
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‎2017-06-07 1:57 AM
Hello Imen ,
We want to migrate our application to STM32F7xx ,the problem is we use a bitbanding to read / write the registre like GPIO ... in STMF4xx ,so in STM32F7xx there isn't a region of bitband ,so could you please suggest a solution with exemple , tutorial ...
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‎2017-06-07 4:37 AM
Hi
youssef.elmzaiti
,Your description here of the problem is not clear.
We need more details about what do you expect exactly as result.
What is the issue that you have and the problem you are facing
with
memory mapping.
You mayhave a look to these application notes that can help you:
- Application note Managing memory protection unit (MPU) in STM32 MCUs,
describes how to manage the MPU.
- Application note Level 1 cache on STM32F7 Series,describes the level 1 cache behavior and gives an example how to ensure the data coherency when using the L1-cache.
Regards
Imen
Thanks
Imen
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‎2017-06-07 4:52 AM
Hi Imen
In STM32F4/2/1 using the cortex ARM M0/0+/3/4 ,if we want to read or write in GPIO ... any bit in registre we should use a bitbanding method(
http://www.scienceprog.com/bit-band-operations-with-arm-cortex-microcontrollers/&sharpcomment-73919
) ,it's simple and effictive ,all our code and application in stm32f4 we use the bantbanding ,so now we want to migratre our application to stm32f7xx ,but in stm32f7 thersn't a bitband région so we can't use a bitbanding method ,could you suggest any solution to read/write the GPIO ... in stm7xx . (sorry bad english) .Regards
youssef
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‎2017-06-07 9:47 AM
Hi
youssef.elmzaiti
,You can use thememory mapped GPIO register:to read the GPIOport input and then youshould mask at CPU level to extract needed data.
For GPIO pin write, it is recommended to use the GPIOx_BSRR register which allows atomic read/modify manipulation.
Regards
Imen
Thanks
Imen
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‎2017-06-08 7:19 AM
Hi Imen ,
Can you give an exemple , demonstration or tutorial ...
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‎2017-06-09 3:20 AM
Hi Imen ,
Thank you for this suggest , but our application is not based with HAL library ,so it's not a solution for us :\ , there's another possibility please ?
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‎2018-05-19 6:02 AM
Hi @elmzairi youssef,
I have one solution for you problem, you can use bit level structs. I dont know if ir is the best solution (effectiviness) but is manage like bit banding on code.
example of bit banding :
#define GPIOA_OD0 (*((__IO uint32_t*)(BITBANDING_BASE+(GPIO_BASE_OFFSET*32)+(BIT_NUMBER*4))))
�?�? In code �?�?
GPIOA_OD0=1;
example with struct :
typedef struct
{
__IO GPIO_MODER_Typedef MODER;
....
....
__IO GPIO_IDR_Typedef IDR;
__IO GPIO_ODR_Typedef ODR;
....
.....
}GPIO_Bits_Typedef;
typedef struct
{
__IO uint32_t OD0: 1;
__IO uint32_t OD1: 1;
__IO uint32_t OD2: 1;
...
...
...
...
__IO uint32_t OD15:1;
}GPIO_ODR_Typedef
#define GPIOA_Bits ((GPIO_Bits_Typedef*)GPIO_BASE))
�?�?- In code �?�?-
GPIOA_Bits->ODR.OD0=1
