2022-03-09 08:08 AM
Hi, I am working on a project for STM32F746ZGT6 that uses the RTC clocked from the LSE.
In some cases I am seeing an issue where the LSE appears to start (LSERDY reads as 1 within the call to HAL_RCC_OscConfig from the peripheral libraries) but it appears that the clock is not running correctly.
I can tell that the LSE is either not running at all, or running with incorrect frequency because:
My main question is, what are the conditions needed for LSERDY to be set to 1?
Clearly whatever these conditions are, they are being met, but I would like to know specifically what this means so that I can try to narrow down the source of issues with my LSE clock
Solved! Go to Solution.
2022-03-10 12:09 AM
LSE is very sensitive to PCB design. The crystal must be placed as close to the uC as possible, no other PCB tracks going under/crossing crystal tracks, no ground plane below the crystal tracks (but ground plane under the crystal is recommended). Setting the high drive option for an oscillator may help a little.
2022-03-10 12:09 AM
LSE is very sensitive to PCB design. The crystal must be placed as close to the uC as possible, no other PCB tracks going under/crossing crystal tracks, no ground plane below the crystal tracks (but ground plane under the crystal is recommended). Setting the high drive option for an oscillator may help a little.
2022-03-10 01:26 AM
Also read AN2867.
JW
2023-11-17 02:45 AM
I also recognized that LSERDY is no sufficiently reliable indicator if the quartz crystal is actually running. To workaround this problem I implemented a simple test which watches if the subsecond register changes (should happen every ~4ms) within 20ms: