Is there a possibility of a mistake in stm32F4/7 reference manual About Encoder mode in Timer section?

[mahdi.masoodi1379]

We have three options to select encoder mode In SMS bits (Slave Mode Selection) of TIMx_SMCR register. Based on the description following each mode in this register, counter counts UP/Down on each TI2FP1/TI1FP2 edge based on the TI1FP2/TI2FP1 level or both (image below):

This is while, based on encoder mode descriptions in section 17.3.16 (Encoder interface mode) and table there (Table 93) and Timer block diagram that exist at the beginning of the season (images below), counter must be changed with edges and levels on TI1FP1 and TI2FP2 not with TI2FP1 and TI1FP2 !!!

Which TI1FP1 and TI2FP1 for IC1 and which TI1FP2 and TI2FP2 for IC2 must be selected to operate correctly? Please help me to understand this contradiction.

[Imen.D]

Hello @mahdi.masoodi1379​ ,

Thanks for pointing out this contradiction.

I am checking it internally and I will come back to you with details.

Imen

[Imen.D]

Hi @mahdi.masoodi1379​ ,

You are right, the description of the SMS bitfield is not correct, here is the good one:

001: Encoder mode 1 - Counter counts up/down on TI1FP1 edge depending on TI2FP2 level.

010: Encoder mode 2 - Counter counts up/down on TI2FP2 edge depending on TI1FP1 level.

Thanks you for noticing us, this will be fixed in the coming release of the RMs.

Thanks

Imen