How to slow down the speed of DMA for ADC

[JParm.1325]

Hi,

I tried to add a DMA for my ADC on STM32F767ZI with 216MHz. I just want to convert one Channel. In my Interface a select circular mode, enabled DMA continuous request, enabled Continuous conversation mode. When I start the DMA, my Buffer get filled up to the 34463th place in my array. After that the Callbackfunktion for halfcomplete gets "activated" and then die complete Callback. Now my Questions, is there any chance to slow down the DMA, that the CPU can reach the halfcomplete Callback when DMA has filled half of my array?

I actually set the prescaler for PCLK2 in ADC Settings to 8 and the PCLK2 to just 13,5MHz.

[Martin.Sergio]

DMA works moving the data from the ADC to your Memory Buffer, ifthe ADC convert the DATA Fast the DMA move your data Fast, if the ADC convert the DATA Slow the DMA move the data Slow

[berendi]

Slow down the ADC, not the DMA. DMA transfers data whenever ADC signals that a conversion is complete. There are two ways

• Increasing the time needed for one conversion. You have already set a clock divisor, it's also possible to increase conversion time in the sample time register SMPR1 up to 480 clock cycles.
• Disabling continuous conversions, ADC can be triggered by a timer. Pick a timer from the table titled External trigger for regular channels in the reference manual. Set up the selected timer channel/trigger to the required sampling frequency, then clear the CONT bit and set EXTEN and EXTSEL accordingly in the ADC->CR2.

[JParm.1325]

Thanks for both advices.