How to interface 15 ADCs with STM32H723

[MDett]

Hi All,

I want to build a system to sense 240 low current signals at 20kSPS at the same time using 15 ADC with 16 channels each (DDC316 by Texas Instruments, Datasheet: https://www.ti.com/lit/ds/symlink/ddc316.pdf). I intend to use something like the NUCLEO-H723ZG to drive this system.

My question is: Is it possible to use OctoSPI to connect to 8 ADCs at the same time?
As far as I can see from the datasheet the sorting of the data will be wrong since the interface expects a parallel data input but maybe I am missing a setting that allows for my use case.

A secondary option would be using multiplexed QuadSPI. Something like this seems to be intended for the ADC, as it features a 4-datalane communication mode. However, again the data sorting (page 13 on ADC datasheet) is different from all the documentation I was able to find on QuadSPI (for example RM0468 or AN5050).

I would be very greatful for any input on this issue and appreciate any support.

Best regards
Marco

[KDJEM.1]

Hello @MDett and welcome to the community;

In order to start, you need verify if the OCTOSPI interface is supported by the ADC device. The command format and order shared in the device datasheet must be aligned with the command format and order mentioned in the STM32 reference.

According the reference manual, in Regular-command protocol, the OCTOSPI communicates with the external device using commands. Each command can include the following phases:
• Instruction phase
• Address phase
• Alternate-byte phase
• Dummy-cycle phase
• Data phase
Any of these phases can be configured to be skipped but, in case of single-phase command, the only use case supported is instruction-phase-only.

Could you please check with which phase can this ADC operate?

In this FAQ: How to connect two quad-SPI memories using only one OCTOSPI - STMicroelectronics Community you can find an example on how to connect two devices (quad memories) using one OCTOSPI.

Thank you.

Kaouthar

[Michal Dudka]

If I understand correctly, you need to capture serial data stream from 15 ADCs, each ADC sends you 256 data bits (16 channels multiply 16bits). SPI clock frequency have to be at least 20ksps*256=5.12MHz. 

You can use for example PSSI (paralel) interface to capture 15 "bit" words. Global clock and CONV signal then can be generated by timer. Disadvantage of this solution is the need to subsequently bitwise rearrange the data...

[MDett]

Hello @KDJEM.1 ,

thank you for your reply.

The ADC does not directly suppoer OCTOSPI, however I am trying to figure out if this interface can be used to read out eight separate singele SPI channels in parallel (from eight ADCs). So for OCTOSPI this would entail using the data phase and some mode or data format (memory type?), that handles the datasorting in a way, that all ADC data is separated correctly. 

Is this possible?

Thank you.
Marco

[MDett]

Hello Michale,

Thank you for your reply.

Yes that is correct. I looke into using PSSI but as you mentioned this would entail rearranging the data bits, which would also have to be done if for example FMC or XSPI is used in a parallel data mode. 
I am not too fimiliar with the inner workings of the MCU so I was wondering if there is a way to either use one of those interfaces in a way that the data is sorted correctly or maybe setup 15 clocked FIFOs to retreive the data.

Best regards
Marco

[Ozone]

> I want to build a system to sense 240 low current signals at 20kSPS at the same time using 15 ADC with 16 channels each ..

Sorry, to me that sounds much like a design nightmare and a bad idea reliability-wise.
Unless you have a very specific use case that exactly requires this configuration.

As a user of such a system, I would rather prefer an expandable platform with options to scale up. Just saying ...