How to interface 15 ADCs with STM32H723

[MDett]

Hi All,

I want to build a system to sense 240 low current signals at 20kSPS at the same time using 15 ADC with 16 channels each (DDC316 by Texas Instruments, Datasheet: https://www.ti.com/lit/ds/symlink/ddc316.pdf). I intend to use something like the NUCLEO-H723ZG to drive this system.

My question is: Is it possible to use OctoSPI to connect to 8 ADCs at the same time?
As far as I can see from the datasheet the sorting of the data will be wrong since the interface expects a parallel data input but maybe I am missing a setting that allows for my use case.

A secondary option would be using multiplexed QuadSPI. Something like this seems to be intended for the ADC, as it features a 4-datalane communication mode. However, again the data sorting (page 13 on ADC datasheet) is different from all the documentation I was able to find on QuadSPI (for example RM0468 or AN5050).

I would be very greatful for any input on this issue and appreciate any support.

Best regards
Marco

[Ozone]

> @Ozone I agree this is not a very neat solution. Is there a better/more common way to measure this number of current signals at 20kSPS? 

Does that mean you have a specific use case, i.e. a requirement for a device with this number of channels and sample rate ?

[MDett]

If necessary, a small FPGA is propably the way to go to adapt the hardware. 5 SPIs with CS multiplex is propably the most straight forward way to go otherwise. 

Thank you again for your input!

[MasterT]

I wonder, what is the next step after you pump 9.6 MBytes/ sec into uCPU.  There is no horse power to do any blue-deep processing or compression, just couple if > more or < less with some thresholds?

Does it make sense after all to stream data? Comparison can be done in hardware, comparator - 2-4 nsec, multiplexing channels also better to do in hardware,  and stream data of one-two channels out of 240 to uCPU

only if there is something interesting happening.