STM32U5G9 DK1 DSIHOST Interface with DSI display Configuration

[Kelly3]

DK1 interface a one lane DSI display. DSI display is using SH8601A LCD driver.  SH8601A only can be initialized in LP mode, not HS mode. In Mx, DSIHOST configuration, 

1.  Bus Turn Around Request is enabled

2.  Transmission commands in LP mode is configured

3. After start DSI, I try to read  the display, it returned TIMEOUT error. 

HAL_StatusTypeDef status;

uint8_t ID_info[1] = {255};

if(HAL_DSI_Start(&hdsi) != HAL_OK) return 1;

uint8_t InitParam0[1] = {0x00};

status = HAL_DSI_Read(&hdsi,0,ID_info,1,DSI_DCS_SHORT_PKT_READ,0xDA,InitParam0);

TIMEOUT error. The reason it is time out is that the following condition in

HAL_DSI_Read function is always false. The GPSR value is : 262229

if ((hdsi->Instance->GPSR & DSI_GPSR_PRDFE) == 0U)

May I know what could cause read failure? 

In PHY timing, 

The HS and LP means which status,  HS means HS 0 or HS 1? LP means LP11, LP01 or LP00?  The read failure might relate to wrong timing configure. 

Thank you.

Kelly

[Kelly3]

Please help on how to calculate these values using MIPI parameters according to display module  Tclk-miss, Tclk_post, Tclk_Pre, Tclk_Prepare, Tclk_settle, Tclk_Trail, Tclk_zero, Teot,   THS_prepare, Ths_Exit, Ths_ zero, Ths_settle, Ths_skip, Ths_trail, etc. Thank you. 

[KDJEM.1]

Hello @Kelly3 ;

Could you please check the PE5 bit status in DSI_ISR0 register?

This bit retrieves the peripheral timeout error from the acknowledge error report.

May be the recommended method in the below  can help you to solve the issue.

For timing values, I recommend you to look at the DS14102 Rev 3 Table 127. MIPI D-PHY AC characteristics LP mode and HS/LP transitions

Thank you.

Kaouthar

[Kelly3]

Kaouthar,

Thank you very much for your help.

DSI_ISR0 register value is 0x10 0000. Which means PE3 error. AE5 is fine.

DSI_GPSR register is： 0X4 0055 . i.e. command FIFO and read/write payload FIFO are empty。

I noticed the mipi timing in data sheet. 

I just don't understand the timing definition in STM32CubeMX. 

For example ： 

in DSIHOST， PHY Timing     

                        LP to HS transition = THS_Prepare，from LP00 to HS-0,          

                   or   LP to HS transition = THS_Prepare + THS_zero，from LP00 to end of HS-1？ 

Also，

If transfer configuration command to display through MIPI in LP mode while DSIHOST is configured to video burst mode，MIPI LP clock will be 15.625MHz as indicated in screenshot below，right？Or LP byte clock is 15.625MHz，LP clock is 15.625*8 = 125MHz？

Regards，

Kelly

[Kelly3]

To add one more information for your reference.  Both ShortWrite and LongWrite return HAL_OK.  But not able to turn the display on and read back its ID. 

if (HAL_DSI_ShortWrite(&hdsi, 0, DSI_DCS_SHORT_PKT_WRITE_P0, 0x11,0x00) != HAL_OK) return 1;

/* unknown command 1 */

uint8_t InitParam2[2] = {0x5A,0x5A};

if (HAL_DSI_LongWrite(&hdsi, 0, DSI_DCS_LONG_PKT_WRITE, 2, 0xC0, InitParam2) != HAL_OK) return 2;

Regards,

Kelly