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Genration of sine wave using DAC of Nucleo-H743zi2 development board

GHARI.1
Associate II

Hello,

I am using DAC module of STM32H743ZI2 micro controller to generate sine wave of 8KHz frequency I am using Timer2 for this setting using APB1 bus of 150MHz and prescaler of 74 and ARR register of 1.

>>The issue I am facing is jitter in the output wave form like +/-50Hz deviation from 8KHz.

>>I want also sine wave whose frequency varies from 5KHz to 20KHz in steps of 0.1Hz with a delay of 100ms between each frequency step with low jitter is that possible

11 REPLIES 11
Georgy Moshkin
Senior II

If your DAC buffer is not multiple of full sine period, then you need to generate values inside HAL_DAC_ConvHalfCpltCallback and HAL_DAC_ConvCpltCallback interrupts. For high sampling rates it could be done using arm_sin_q31 or arm_sin_q15, and global phase accumulator variable (for example, named phaseVal):

uint32_t phaseVal;
// ...
 
phaseStep=round(0x100000000*freq/sampleFreq); 
 
// ... loop in callback to generate new values for DAC in circular DMA mode:
for (int i=idx1;i<idx2;i++)
arm_sin_q31((phaseVal)>>1)
phaseVal=phaseVal+phaseStep;
audioBuffer[i]=...

note that phase accumulator does not require check for overflow and incremented endlessly. It wraps around to zero by itself and provides correct phase value. For personalized solution contact me through profile

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LCE
Principal

Also make sure that you are not using the internal RC oscillator (HSI) as a clock source, these usually have high jitter.

good point, In some cases you can use external reference signal (1sec, 32khz, etc..) , and perform timer input capture to measure CPU cycles and calculate correction coefficient for a frequency.

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Is there any example of this code. Right now I am just storing sine wave values and sending to DAC using DMA.

How to use timer input capture . I didn,t get you

It was a short example,

float freq = ... // frequency of generated tone
float sampleFreq = ... // your sampling frequency

in HAL_DAC_ConvHalfCpltCallback you generate one half of the signal using

idx1=0;
idx2=AUDIO_BUFFER_SIZE/2;

and in HAL_DAC_ConvCpltCallback 

idx1=AUDIO_BUFFER_SIZE/2;
idx2=AUDIO_BUFFER_SIZE;

Can't post whole source, it was from commercial product. You can contact me directly by email in profile

But I am sure you can figure it out from these short snippets.

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If you have a stable external signal generator (Pulses from GPS module, etc.) , and do not use crystal, then

you can count CPU cycles. For example some APB bus is 180MHz = 180000000, but because HSI is not very stable, you will count say 180195829 cycles, and can calculated corrected sample frequency for tone generation calculations:

float f1=180000000.0;
float f2=real_counted_cycles;
float coeff=(1.0/f1)/(1.0/f2);
correctedSampleFreq=requiredSampleFreq*coeff;

If your project uses external +-20ppm crystal, then you can generate frequency with about +-20ppm error. For example, when generating 15kHz, error would be around +-0.3Hz:

ppm=20*10^-6;

freq=15*10^3

offs=freq*ppm=0.3 Hz

Digitally you can have 0.01Hz resolution, but precision is limited by resonator (crystal) ppm value.

For 0.1 Hz precision you will need better crystal, or use external reference signal. If you do not need high precision, any external crystal will be ok.

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How do I decide sampling frequency in the code you mentioned

You can trigger DAC with a timer, sampling frequency will be equal to timer trigger frequency.

Usually you want sampling frequency around 5 times higher than maximum tone frequency, but you can google on that, it depends on what external components and filtering is used (with low pass + buffer you can smooth signal and have good results with lower sampling frequency).

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