FDCAN STM32H753VIT6 – Unable to Achieve >1.92 Mbps Data Rate (PLL1Q = 40 MHz)

[pavanl]

Hi ST Community,

I’m working on a CAN FD project using the STM32H753VIT6 and facing a limitation with data phase bitrate while using Bit Rate Switching (BRS).

My Setup:

• Controller: STM32H753VIT6

• FDCAN clock source: PLL1Q

• PLL1Q output: 40 MHz

• Frame format: CAN FD with BRS (FDCAN_FRAME_FD_BRS)

• Nominal (arbitration) bitrate: 1 Mbps

• Target data bitrate: 2 Mbps or higher
  
  

   Problem:

  Despite the configuration, I'm not able to achieve more than ~1.92 Mbps on the data phase. Even when I reduce the number of time quanta or adjust prescalers, the speed does not increase beyond this limit.

   My Questions:

  1. Is there any known limitation when using PLL1Q = 40 MHz for FDCAN clock?

  2. Is the STM32H753 internal FDCAN limited to certain bitrates per kernel clock frequency?

  3. Could internal synchronization or sampling constraints prevent achieving the expected 2.5 Mbps from a 40 MHz FDCAN clock?

     Attachments:

     • main.c file

     • Oscilloscope screenshot showing BRS waveform and time base

     • STM32CubeMX clock configuration screenshot

  Any insights or suggestions would be greatly appreciated!
  
  Thanks in advance,
  Pavan

[mƎALLEm]

You didn't answer that question: did you try with the Loopback mode?

[pavanl]

Yes, I used external loopback mode to test the configuration, and I was able to achieve stable communication at both 5 Mbps and 8 Mbps data phase bitrates. I verified the bitrates using a DSO by measuring the bit duration.

[mƎALLEm · Accepted solution]

Did you activate the delay compensation?:

  /**
    * Configure and enable Tx Delay Compensation, required for BRS mode.
    * TdcOffset default recommended value: DataTimeSeg1 * DataPrescaler
    * TdcFilter default recommended value: 0
    */
  if (HAL_FDCAN_ConfigTxDelayCompensation(&hfdcan1, (hfdcan1.Init.DataPrescaler * hfdcan1.Init.DataTimeSeg1), 0U) != HAL_OK)
  {
    Error_Handler();
  }

  if (HAL_FDCAN_EnableTxDelayCompensation(&hfdcan1) != HAL_OK)
  {
    Error_Handler();
  }

Please refer to this Github link linked to this article: STM32 FDCAN running at 8 Mb/s on NUCLEO boards

[pavanl]

At first, I had not enabled Tx Delay Compensation. After your suggestion, I enabled it as recommended for CAN FD with Bit Rate Switching (BRS) mode. As a result, I was able to achieve communication at 8 Mbps.

Thank you for your valuable guidance.