Do FSK or PSK using HRTIM on STM32G474RE

[mala]

Hello everyone,

I'm trying to do FSK and PSK modulation using HRTIM in STM32G474RE but I have what I want when I use Oscillo to display.

For example, 

• '1' = 45 kHz and '0' = 55 kHz. I want to transmit the message "1010" where each bit is 10µs long (FSK)
• '1' = 5 kHz and '0' = 10 kHz. Carrier frequency = 400 kHz. I want to transmit the message "1010" where each bit is 10µs long and with an phase shift of 11.5°.

How can I do this ? 

If someone can help me or have an another solution using nucleo ST board. Do not hesitate to suggest me please.

Best regards,

[ELABI.1]

Hi @mala,

There are many possible solutions, such as the chopper feature, but below is the simplest one: Since FSK needs to modulate PWM frequency for both mark ('1') and space ('0') with different frequencies, you will need to adjust this frequency each bit period, in this case, 10 µs. Therefore, you will need two timers: one for PWM generation and another for bit timing. When the bit timer expires, you will modify the PWM timer to match the bit frequency.

This is the configuration for Timer B, which is used to handle the bit timing of 10 µs, leading to 100 kHz. The interrupt is enabled at the timer reset:

This interruption should be used to modify the second timer period, Timer A, in order to handle a new PWM frequency as shown in the screenshot below:

This timer is used for PWM, with 55khz frequency, and half mode for PWM generation, so modifying the period will keep a 50% duty cycle, at Timer B interrupt routine, SW/User should modify the period of this timer, to decide about the frequency, 45khz to generate bit1, 55khz as configured initially to generate bit0.

I hope this can help you.

Thank you.

ELABI.1

[mala]

Hello @ELABI.1 ,

Thank you for your responses, but now I could you tell me, where or how to bind these two Timers ? for the synchronization? And about the output, I want only one output. this will be on Timer A so?

Please, if this is possible I would like to have the full configuration of these Timers and others examples.

Thanks

[ELABI.1]

Hi @mala,

In the initial request, I didn't understand why bits 1 and 0 have different frequencies but the same duration = 10 µs.

I need more information to provide an accurate configuration and better understand your intent. It would be helpful if you could provide more details, such as the duration (in µs) of the mark (bit 1) and the space (bit 0), as well as the frequency of the carrier...

You will find attached a project with a Timer unit and a waveform. The `main.c` file contains the method that allows modifying the frequencies when the expected bit duration is reached (a multiple of the carrier duration, see the `HAL_HRTIM_CounterResetCallback` function in `main.c`). Please note that this is only an example and doesn't exactly match your request, but this configuration will also help you create your own setup.

Thank you.

ELABI.1

[mala]

Hello @ELABI.1 ,

I find something for FSK. 

Now I'm searching for PSK. I need only one output to display on oscilloscope. I use stm32g474RE and want to have phase shift of 22° when the bit change (ex : 1 --> 0 or 0 --> 1) and nothing change when I have (1 --> 1 or 0 --> 0). Each bit avec a duration (ex : 1 --> 75 µs and 0 --> 140 µs) with the carrier of 480 kHz using HRTIM.

Can you help me with this please?

Thank you

Best regards

[ELABI.1]

Hello @mala,

You will find attached an example of code to generate a PSK behavior.

In the code, I reduced the number of pulses for both mark and space to better illustrate the waveforms. Normally, it should be:

• 1 ⇒ 36 periods (480 * 75 / 1000)
• 0 ⇒ 67 periods (480 * 140 / 1000).

The code is based on a handler for each carrier period and a state machine that executes a sequence according to your choice. For example, the sequence 10100 corresponds to:

 {BIT_Progress1_Toggle, BIT_Progress0_Toggle, BIT_Progress1_Toggle, BIT_Progress0_Keep, BIT_Progress0_Toggle, BIT_Stop};

If the state is a toggle, you should add a delay for the phase shift:

Phase_Delta = (22/360)*Tc = 0.127 us = 0.061*Tc

Otherwise, if it is a keep state (stay at the same polarity), the phase shift is removed.

Please note that since the carrier frequency is high, the routine should be optimized to execute quickly in order to handle the next bit efficiently.

Note:  The programming of HRTIM was done with the PRELOAD feature, which means that register updates are done in one cycle but take effect in the next cycle. This is important for preparing transitions to phase shift or other bits by adapting the period. The IOC contains these programming details.

I hope this can help you.

Thank you.

ELABI.1