2022-03-01 08:48 PM
I tried to change SPI1 to SPI4 in the LL example code.
My problem is I cannot detect any signal on the CLK or data pins.
void Configure_SPI4_DMA(void)
{
/* DMA2 used for SPI4 Transmission
* DMA2 used for SPI4 Reception
*/
/* (1) Enable the clock of DMA2 and DMA2 */
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA2);
/* (2) Configure NVIC for DMA transfer complete/error interrupts */
NVIC_SetPriority(DMA2_Stream0_IRQn, 0);
NVIC_EnableIRQ(DMA2_Stream0_IRQn);
NVIC_SetPriority(DMA2_Stream1_IRQn, 0);
NVIC_EnableIRQ(DMA2_Stream1_IRQn);
/* (3) Configure the DMA2_Stream0 functional parameters
* F411 User Reference pg 170, Table 28. DMA2 request mapping (STM32F411xC/E)
* */
LL_DMA_ConfigTransfer(DMA2,
LL_DMA_STREAM_0,
LL_DMA_DIRECTION_PERIPH_TO_MEMORY | LL_DMA_PRIORITY_HIGH | LL_DMA_MODE_NORMAL |
LL_DMA_PERIPH_NOINCREMENT | LL_DMA_MEMORY_INCREMENT |
LL_DMA_PDATAALIGN_BYTE | LL_DMA_MDATAALIGN_BYTE);
LL_DMA_ConfigAddresses(DMA2,
LL_DMA_STREAM_0,
LL_SPI_DMA_GetRegAddr(SPI4), (uint32_t)aSPI4_RxBuf,
LL_DMA_GetDataTransferDirection(DMA2, LL_DMA_STREAM_0));
LL_DMA_SetDataLength(DMA2, LL_DMA_STREAM_0, ubSPI4_NByte2Rx);
LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_0, LL_DMA_CHANNEL_4);
/* (4) Configure the DMA2_Stream1 functional parameters */
LL_DMA_ConfigTransfer(DMA2,
LL_DMA_STREAM_1,
LL_DMA_DIRECTION_MEMORY_TO_PERIPH | LL_DMA_PRIORITY_HIGH | LL_DMA_MODE_NORMAL |
LL_DMA_PERIPH_NOINCREMENT | LL_DMA_MEMORY_INCREMENT |
LL_DMA_PDATAALIGN_BYTE | LL_DMA_MDATAALIGN_BYTE);
LL_DMA_ConfigAddresses(DMA2, LL_DMA_STREAM_1, (uint32_t)aSPI4_TxBuf, LL_SPI_DMA_GetRegAddr(SPI4),
LL_DMA_GetDataTransferDirection(DMA2, LL_DMA_STREAM_1));
LL_DMA_SetDataLength(DMA2, LL_DMA_STREAM_1, ubSPI4_NByte2Tx);
LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_1, LL_DMA_CHANNEL_4);
/* (5) Enable DMA interrupts complete/error */
LL_DMA_EnableIT_TC(DMA2, LL_DMA_STREAM_1);
LL_DMA_EnableIT_TE(DMA2, LL_DMA_STREAM_1);
LL_DMA_EnableIT_TC(DMA2, LL_DMA_STREAM_0);
LL_DMA_EnableIT_TE(DMA2, LL_DMA_STREAM_0);
}
void Configure_SPI4(void)
{
/* (1) Enables GPIO clock and configures the SPI4 pins ********************/
/* Enable the peripheral clock of GPIO Port
* GPIO Port A is enabled in LED_Init, here we ignore.
* This can easily introduce bug.
* We should use LL_AHB1_GRP1_IsEnabledClock to check,
* if 0: not enabled, enable it.
* */
if(! LL_AHB1_GRP1_IsEnabledClock(LL_AHB1_GRP1_PERIPH_GPIOB)) {
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB);
}
/* Configure SCK Pin PB13 */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_13, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetAFPin_0_7(GPIOB, LL_GPIO_PIN_13, LL_GPIO_AF_5);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_13, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_13, LL_GPIO_PULL_DOWN);
/* Configure MISO Pin PA11 */
LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_11, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetAFPin_0_7(GPIOA, LL_GPIO_PIN_11, LL_GPIO_AF_5);
LL_GPIO_SetPinSpeed(GPIOA, LL_GPIO_PIN_11, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinPull(GPIOA, LL_GPIO_PIN_11, LL_GPIO_PULL_DOWN);
/* Configure MOSI Pin PA1 */
LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_1, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetAFPin_0_7(GPIOA, LL_GPIO_PIN_1, LL_GPIO_AF_5);
LL_GPIO_SetPinSpeed(GPIOA, LL_GPIO_PIN_1, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinPull(GPIOA, LL_GPIO_PIN_1, LL_GPIO_PULL_DOWN);
/* (2) Configure SPI4 functional parameters ********************************/
/* Enable the peripheral clock of GPIOB */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI4);
//LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2);
/* Configure SPI4 communication */
LL_SPI_SetBaudRatePrescaler(SPI4, LL_SPI_BAUDRATEPRESCALER_DIV4);
LL_SPI_SetTransferDirection(SPI4, LL_SPI_FULL_DUPLEX);
LL_SPI_SetClockPhase(SPI4, LL_SPI_PHASE_1EDGE);
LL_SPI_SetClockPolarity(SPI4, LL_SPI_POLARITY_LOW);
/* Reset value is LL_SPI_MSB_FIRST */
LL_SPI_SetTransferBitOrder(SPI4, LL_SPI_MSB_FIRST);
LL_SPI_SetDataWidth(SPI4, LL_SPI_DATAWIDTH_8BIT);
LL_SPI_SetNSSMode(SPI4, LL_SPI_NSS_SOFT);
#ifdef MASTER_BOARD
LL_SPI_SetMode(SPI4, LL_SPI_MODE_MASTER);
#else
/* Reset value is LL_SPI_MODE_SLAVE */
//LL_SPI_SetMode(SPI4, LL_SPI_MODE_SLAVE);
#endif /* MASTER_BOARD */
/* Configure SPI4 DMA transfer interrupts */
/* Enable DMA RX Interrupt */
LL_SPI_EnableDMAReq_RX(SPI4);
/* Enable DMA TX Interrupt */
LL_SPI_EnableDMAReq_TX(SPI4);
}
2022-03-03 01:14 AM
In the alternate function mapping table, there are other pins (PExx) that are also associated with SPI4. I wonder how the configuration works to choose one set instead of the other.
2022-03-03 06:12 AM
Yep, looks like you need AF6 on two of the pins.
AF simply makes the internal connection. You can select SPI4_SCK on two pins and it will output to both of them.
2022-03-03 05:56 PM
yes, for CLK and MISO pins. But there is still not signal on the 3 pins.