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Dual bank flash organization on STM32U5

williams-one
Visitor

I've been looking at the information on the flash organization in the Reference manual RM0456 for STM32U5.  In particular I'm trying to understand how the DUALBANK flag works on this family.

In section 7.3.1, there is this table for STM32U5G with 4MB of internal flash

williamsone_0-1732607763642.png

In the note (1) it mentions that with DUALBANK = 1 in option bytes (which should be the default as far as I have understood), the base address for bank 2 is 0x0810_0000. But this means that bank 1 is now only 1MB.  So are the two banks overlapped?

Also it is not clear to me what happens to the page size when using dual/single bank?  Is it doubled?

I have seen that there is an application note for the F7 family, but I don't understand if the U5 family works the same

https://www.st.com/resource/en/application_note/an4826-stm32f7-series-flash-memory-dual-bank-mode-stmicroelectronics.pdf

Could someone please give me some additional details on how DUALBANK flag works on this family or point me to some documentation that better describes this feature?

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