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williams-one · 2025-01-14

Hello,I have a question regarding write access to a PSRAM connected via XSPI in memory mapped mode on a STM32H7RS.I do not completely understand if having the PSRAM memory mapped makes it available to the ECU as if it is internal RAM, meaning that it...

williams-one · 2024-11-26

I've been looking at the information on the flash organization in the Reference manual RM0456 for STM32U5. In particular I'm trying to understand how the DUALBANK flag works on this family.In section 7.3.1, there is this table for STM32U5G with 4MB ...

williams-one · 2024-11-26

Thanks for the feedback FBL. It was really helpful!!I totally overlooked the fact that those chips can have either 2 or 4 MB of flash. Now that makes sense.Can you please also provide additional details on what changes setting DUALBANK flag to 0/1?...

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Write access to PSRAM on XSPI in memory mapped mode

Dual bank flash organization on STM32U5

Re: Dual bank flash organization on STM32U5