cancel
Showing results for 
Search instead for 
Did you mean: 

Dac -> COMP -> Timer -> DMA -> dual SPI_TX

pixeltamer
Associate II

I've been programming microprocessors for over 40 years and the STM32F301K8 has me stumped.
I'm required to use it in a low budget project with some unusual characteristics.

I need a working example of:
Using STM32CubeIDE and the target STM32F301K8 or STM32F302K8. I have the NUCLEO-F446RE development board to work with and it has the appropriate capabilities for testing. (Pin references below are for the stm32F301)
1) A preset DAC output level is linked to a comparator (minus input PA4), with an external analog input signal to same comparator (positive input PA7).
2) When the comparator output transitions to negative output, a pair of SPIs are to be triggered. The two SPIs (Tx only), each using a DMA output in synchronous parallel. The contents of the buffers act as a 2-bit wide nonblocking & uninterrupted data stream. An interrupt is needed when sending is complete.
3) The SPIs will run at 4MBs, 8-Bit, msb first, no delay between bytes, outputs (PB5 & PA11).
4) A small programmable delay will most likely be needed between when the comparator trips and the SPIs start. Something like a very fast one-shot or PWM (less than 4us).
5) Basically, this routine is independent of the code processor as the output is synced to an external input and must remain synchronous until the buffers are empty.
The code part of the microprocessor will be used to set the DAC level, the delay, and determine what data to put into the contents of the two SPI buffers.

Configuring the individual modules seems to be relatively obvious to me using HAL directives, however tying them together is baffling.
Virtually every USART and SPI example I have found and tried transmits data only once in the DMA modes.

A code snippet showing how it is all tied together would be greatly appreciated.
Can anyone help?

Pixeltamer

11 REPLIES 11
PGump.1
Senior III

Hi,

After 40 years, you should know that this will require two DMAs, and you can't get DMAs to operate simultaneously. There is will arbitration, and a winner - so, zero delay between them will be difficult.

One way you could try - one SPI as a master, the other as a slave, link the NSSs and CLKs together - that will sync them...

I hope that helps.

Kind regards
Pedro

AI = Artificial Intelligence, NI = No Intelligence, RI = Real Intelligence.
Hi,
That could work, someone claims to have done it before, contacting them failed. 
I don't understand the method to the madness.
I can put all of the pieces in place and set their values, and drive them individually from simple code, and that is fairly easy. 
I'm not used to the 32bit processor in this scope and have used it a few times for more mundane processes.
The method of tying the pieces together outside of the inline code process is not well understood by me.
Perhaps there is a more advanced teaching aid beyond "Hello World", which I've done hundreds of times on many processors and FPGAs. 
I've downloaded the Spec sheet, the "UM1940 User manual", and "RM0316 Reference manual", and scanned much of them. They read like a reference guide to the designer, who already has intimate knowledge of the inner workings, something I don't yet have. The numbers are there, but the process is either not there or I missed it.
This is why I asked for a working example, perhaps hoping for the ahh-ha moment where it all falls into place.  
Thanks,
Pixeltamer
 

Hi,

I've never had an 'ahh-ha' moment when copying someone else's work.

Although, I must admit - R&D is not for everyone...

Kind regards
Pedro

AI = Artificial Intelligence, NI = No Intelligence, RI = Real Intelligence.

Hi,

I think I've had an ahh-ha moment with every processor I've ever worked with, starting with the IBM 1620.

Every compiler has its idiosyncrasies, each assumes that you've taken two semesters of training and have total recall. And like every teacher/professor I've had, teaches the trivial example to a problem and assigns a complex test question, where none of the variables drop out. The compilers do tend to use similar notation to that in the manuals, but it doesn't always translate well, hence the training requirement. Having 10,000 options adds to the confusion.

I'm not used to processors that have internal automated sub systems that allow a certain amount of parallel processing. Most of the nonblocking parallel things I designed were on an FPGA, where I had to build my own serial interfaces. I guess I could do that again, but I was told the STM32F301 could do the deed and was asked to use it. 

I usually learn better by example, so I ask for examples.

Pixeltamer

Examples of what in particular? 

Have you read the Reference Manual?

JW

Hi,

This is NOT an example, but it is a solution.

Setup a SPI master with TX DMA. The SPI can be configured, however, keep SPE = 0 (disabled). Configure the DMA ready to go, with Interrupt.

Setup a SPI slave with TX DMA. The SPI can be configured and enabled. The SPI_CLK to be connected (wired) the master SPI_CLK (above). You may need to preload the SPI_DR with the first byte…

Setup the COMP and DAC as you wish. Feed the COMP output into a Timer to trigger an Event (perhaps a count of 1). Use the Timer output pin to activate the SPI_NSS of the slave. Use this Timer to also trigger a third DMA for a single byte transfer –> SPE = 1 of the Master SPI.

The Master SPI DMA will interrupt when it's all done…

Kind regards
Pedro

AI = Artificial Intelligence, NI = No Intelligence, RI = Real Intelligence.

Hi,

I'm about 800 pages into "RM0316 Reference manual". The timer section is incredibly complex.

As outlined in the first panel of this request, I'm trying to figure out how to tie the elements together such that an external trigger into the comparator, initiates a tiny preset delay and then starts two SPI streams using DMAs acting like a two-bit parallel data stream. Beyond that I feel confident that I can build the rest of my program around that core. The linear part of the code will attempt to load data into the two SPI DMA data streams, adjust the delay, communicate with another processor, and a bunch of other things that only I need to worry about. 

I was trying to do this using the HAL directives in the ".IOC" file, but it is becoming apparent that I may have to abandon that tactic and build everything manually. The low-level commands may have to be called into play. I'm trying to learn their syntax structure. 

I have and read, and tried the examples in the book "Programming with STM32" by Donald Norris and it is helpful Building "hello world" examples, but it doesn't take one to the next level.

Thanks,

Pixeltamer

 

Hi,

Complexity usually = flexibility...

I'm assuming you have an IDE, such as STM32CubeIDE? If you have, you should also have a configuration tool called CubeMX, do you have them?

Kind regards
Pedro

 

AI = Artificial Intelligence, NI = No Intelligence, RI = Real Intelligence.

Yes, I'm using STM32CubeIDE latest version and CubeMX.

Version: 1.16.1

Build: 22882_20240916_0822 (UTC)

STM32CubeMX - STM32 Device Configuration Tool

Version: 6.12.1-RC4

Build: 20240912-2256 (UTC)

I always try to use the recommended IDE for developing on a chip. I am using C in an STM32 project.

Thanks for asking.

Pixeltamer