2020-06-03 09:37 AM
The data sheet isn't specific, apart from one diagram Figure 13 that shows IO's box with an arrow from VDD that then connects to a level shifter to the core domain.
Please advise. A real handy feature would be to alternative voltage IO for the SPI's.
2020-06-03 09:52 AM
Which STM32?
> The data sheet isn't specific,
GPIO levels apply to all IO, except where explicitly noted otherwise.
> A real handy feature would be to alternative voltage IO for the SPI's.
Some STM32 have a group of IO supplied from a separate VDDIO2 pin.
JW
2020-06-03 11:02 AM
Thank you.
I wrote in in the original question but they cropped it to STM32 MCU's..
Its the STM32H755xI.
🙂
2020-06-03 03:19 PM
Who cropped it and where's the original question?
According to 'H755 DS, there's no VDDIO2 but there appears to be a group of pins supplied by VDD33USB, _u suffixed in STM32H755xI pin/ball definition table, which maybe can be used at different voltage if USB is not used.
JW