2024-07-17 10:27 PM - edited 2024-07-22 05:18 AM
Hello STM32 Community,
I am currently working on a USB Power Delivery (USB PD) project using an STM32L562CET6 microcontroller, where I successfully vary the output voltages and currents (5V 3A, 9V 3A, 12V 3A, 15V 3A, and 20V 5A) in SPR (Standard Power Range) Mode using the provided usbpd_pwr_if.c code.
I am exploring the possibility of achieving the same functionality using a bit-banging method. Specifically, my goal is to configure the CC lines as GPIO in analog mode and generate the SPR signal pattern manually. I understand that USB PD communication involves precise timing and voltage levels, and I would like to confirm whether this approach is feasible with an STM32L562CET6 microcontroller.
My Questions:
1. Is it technically possible to achieve reliable USB PD communication using bit banging on an STM32L562CET6 microcontroller?
2. What are the key challenges and limitations associated with this approach?
3. Are there any specific STM32L562CET6 features or peripherals that could assist in achieving precise timing and voltage level control for USB PD signals via bit banging?
4. Has anyone in the community successfully implemented a similar approach, and if so, could you share your insights or experiences?
Any guidance, suggestions, or references to relevant documentation would be greatly appreciated.
Thank you!
Best regards,
Sankar Eswaran
Solved! Go to Solution.
2024-07-23 06:53 AM - edited 2024-07-23 08:33 AM
Hello @Sankar_Eswaran
for me bit banging for USBPD is impossible. You need to program the complete frame: preamble, SOP, the header, the CRC, the EOP. How will you be fast enough to decode received frames by software ? You need to handle multiple registers in parallel. The solution provided by ST is optimized thanks to the use of interrupts, timers and DMAs.
You will also not be able to manage collision avoidance easily... The CC line is bidirectionnal...
Why do you want to do that, as you have something functional already, using the ST USBPD stack ?
Do you want to reproduce the CC line communication on some other classic GPIOs ? This isn't possible, because the CC IOs are specially designed to respect rising and falling time at the right voltage level. There is dedicated PHY to achieve this, to respect the eye diagram required by the USBPD specification.
Regards,
Nicolas
2024-07-21 09:49 PM
hello any answer suggestions ?
2024-07-22 05:59 AM
Hello @Sankar_Eswaran
AFAIK, there is no known or documented case of implementing USB PD communication using bit-banging on an STM32. Most implementations rely on dedicated HW peripherals or external USB PD controllers to handle the precise timing and voltage requirements of the protocol.
To learn more about bit banging, you can check AN4655, section 2.2.1 Bit banging and section 2.3.2 Interrupts and DMA vs. bit-banging.
To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.
2024-07-22 06:48 AM
Hello FBL,
Thank you for your response.
I understand that there are no known or documented cases of implementing USB PD communication using bit-banging on an STM32. However, I would like to confirm explicitly: is it technically possible to achieve reliable USB PD communication using bit-banging on the STM32L562CET6 microcontroller? I need to know if it's possible or not.
Thank you for your clarification.
Best regards,
Sankar Eswaran
2024-07-23 06:53 AM - edited 2024-07-23 08:33 AM
Hello @Sankar_Eswaran
for me bit banging for USBPD is impossible. You need to program the complete frame: preamble, SOP, the header, the CRC, the EOP. How will you be fast enough to decode received frames by software ? You need to handle multiple registers in parallel. The solution provided by ST is optimized thanks to the use of interrupts, timers and DMAs.
You will also not be able to manage collision avoidance easily... The CC line is bidirectionnal...
Why do you want to do that, as you have something functional already, using the ST USBPD stack ?
Do you want to reproduce the CC line communication on some other classic GPIOs ? This isn't possible, because the CC IOs are specially designed to respect rising and falling time at the right voltage level. There is dedicated PHY to achieve this, to respect the eye diagram required by the USBPD specification.
Regards,
Nicolas
2024-07-25 03:34 AM