Can't enable and disable writing in MT25QL512 external flash memory

[Mailson97]

Hello, everyone. I am developing a prototype using a STM32L475 and the NOR flash memory MT25QL512ABB. I am using the QuadSPI peripheral for the communication with these parameters:

I used the QSPI_ReadWrite_IT example as a reference to fill these parameters. When I try to send the commanda to enable or disable memory writing commands, the DQ1 pin stays in high state. Every time I try to send write enable (0x06) or write disable (0x04), the command turns into 0x26 due to DQ1 high as shown below:

I used a debugger and saw that the QuadSPI CCR register right before the command is sent has the right value. I also accessed the memory registers in quad mode to see their content:

Registers data:
STATUS REGISTER (0x05): 0x00
Status register write enable/disable: 0
Write enable latch: 0
Write in progress: 0

FLAG STATUS REGISTER (0x70): 0x80
Program or erase controller: 1
Erase suspend: 0
Erase: 0
Program: 0
Program suspend: 0
Protection: 0
Addressing (3 or 4 bytes): 0

NONVOLATILE CONFIGURATION REGISTER (0xB5): 0xFF 0xFF
Double transfer rate protocol (E/D): 1
Reset/hold (E/D): 1
Quad I/O protocol (E/D): 1
Dual I/O protocol (E/D): 1
Number of address bytes during command entry (4 or 3 bytes): 1

VOLATILE CONFIGURATION REGISTER (0x85): 0xFB

ENHANCED VOLATILE CONFIGURATION REGISTER (0x65): 0x7F
Quad I/0 protocol (E/D): 0
Dual I/O protocol (E/D): 1
Double transfer rate protocol (E/D): 1
Reset/hold (E/D): 1

EXTENDED ADDRESS REGISTER (0xC8): 0x00

I also noticed that the DQ1 is not following the same behavior comparing with the other pins. I included the Write enable command after reading each register and right before the read command, DQ1 goes low (and change its state to send the right read register command) and after trying to send the write enable command, DQ1 stays in High state. Doing this, I can't read the registers data properly as well.

I tried sending these writing enable and disable commands in all modes, but I wasn't able to change the write enable latch in the status register. Another huge problem is that I can run the same code within the STM32G474VET and the same memory type and it runs perfectly as shown below:

[KDJEM.1]

Hello @Mailson97 and welcome to the community :),

I think you facing the same issue detailed in the errata sheet ES0302 Rev 8  2.6.1 QUADSPI_BK1_IO1 is always an input when the command is sent in Dual- or Quad-SPI mode section. 

The Dual-/Quad-instruction mode of Micron or Numonyx Flash memories is working fine when user does not send only a command in the frame. For example, the Write enable command can be avoided by writing directly the status register of the Flash memory instead.

Thank you.

Kaouthar

[Mailson97]

Hi @KDJEM.1 . Thank you for your answer and sorry for the delay in responding. Indeed, this is the problem I am facing, but I wasn't able to do any workaround. According to the memory datasheet, to write any register, I need to send the Write Enable command before, what is not working.

I also tried to reset the flash memory quad spi mode and send the Write Enable in SPI mode, but to do it, I need to send a command in QPI mode and according to the errata, a command frame with just the instruction phase won't work. I even tried to add a data phase and yes, the command on the logic analyzer was right (0x06), but probably the flash memory was discarding it because I was sending more clock cycles due to a fake data phase.

Regarding the errata, I think that the only thing I haven't tried yet was reset the memory every time I need to send a command with just the instruction phase, but I don't have an accessible reset pin and I don't even think that this solution would be efficient in my case. In short, this limitation of not being able to send just a command is making me think about replacing the MCU for another one of the ultra-low-power series that doesn't has this problem.