ADC data is only being read alternately (TIM1 + DMA)

[thannara123]

"Hi,

I am trying to read an ADC value from the feedback of a PWM signal generated via TIM3 PWM.

TIM1 generates a PWM signal with 4 channels, including complementary channels. The CCR value updates from the Sine table using DMA.

The ADC is being read when the TIM1 update event occurs. The ADC data is saved to the buffer via DMA.

However, when I try to read the ADC, the data is only saved alternately.

Why is this happening?"

[AScha.3 · Accepted solution]

Hi,

(you didnt show) maybe you set the DMA to transfer word size? Then it writes int32 , but you want half-word, uint16_t.

set:

[thannara123]

Thanks it was the problem used uint16_t and changed to uint32_t ADC_RES[10];