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STM32 MC Workbench v6.3.2 – TIM1 omitted from generated .ioc in Six‑Step projects

FPare.1
Associate

Environment

  • MC Workbench: v6.3.2

  • WB_to_Mx plug‑in: v6.2.3.template‑24‑04‑17

  • STM32CubeMX: v6.14.1

  • Target MCU: STM32L476RGT3 (LQFP64) – STM32L4 family

  • Toolchain: STM32CubeIDE, HAL drivers, STM32 FW v1.18.1

Issue summary

When a project uses a custom inverter with the Six‑Step algorithm and TIM1 selected for PWM generation, the files produced by WB_to_Mx are incomplete:

Expected Result in generated files

M1_PWM_TIMER_SELECTION = PWM_TIM1 present in .stwb6TIM1 completely absent from .ioc.wb
TIM1 channels (CH1/CH2/CH3 + complementary) mapped to PA8/PA9/PA10 and PB13/PB14/PB15No GPIO configuration for these pins
Mcu.IP=TIM1 entry in .iocMissing
MX_TIM1_Init() and associated HAL codeMissing
Other peripherals (USART2, TIM3 for Hall, DMA, etc.)Generated correctly

FreeMarker also logs “evaluated to null or missing” errors while creating several header/source files, leaving key parameter macros undefined.

Requested action

  • Confirm whether this TIM1 omission is a known bug in MC Workbench v6.3.2 / WB_to_Mx v6.2.3.

  • Advise if a fix or patch is planned and provide an estimated release date.

  • If needed, I've attached a ZIP file containing the entire project, including the .wbdef, .ioc.wb, and .stwb6 files

Thanks,
Federico.

Screenshot 2025-04-22 170307.png

 

Screenshot 2025-04-22 170331.png

 

Screenshot 2025-04-22 170421.png

 

1 REPLY 1
Fabrice LOUBEYRE
ST Employee

Hi FPare.1,
unfortunately, the MCSDK 6.3.2 and next scheduled version do not support such kind of STM32L4 board.
6step algorithm is only supported with STM32G4, STM32G0, STM32F4, STM32F3, STM32F0 and STM32C0 board families.
You pointed out an error into the MCSDK tool allowing the project definition and a non-working code generation of this board configuration for 6step algorithm.
We will modify the next versions of the tool to forbid this.
Sorry for the inconvenient.
Best Regards.
Fabrice