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How to design eft filter with performance criteria A, for dc power line?

8bit
Associate

Hello

I need to design an EFT filtering circuitry in front of the DC-DC power lines to suppress industrial transients, according to standart IEC 61000-4-4.

I need performance criteria A (device is not affected any of the transients) suppression for at least level 2 (2 kV and 5 kHz) eft bursts in my design.

So far with the help of the basic elements I can suppress level 1 transient waves (0.5 kV 5 kHz). In the design I use two ferrite beads one in the voltage side and one in the ground. Then I added varistor, tvs and common mode choke in parallel and series inductors again one in voltage side and one in the ground. Lastly I added capacitor block consists of 7 caps in parallel decreasing of factor 10 from 1000 uf to 1nf.

What improvements should I do to suppress these level 2 transients with criteria A performance?

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