STM32 MCUs

Hi Technical Support team,Platform: STM32H7B3I-EVAL board (MB1331-H7B3LIQ-D04)I want to understand memory and flash usage when we build and run any application using TouchGFX Designer  on STM32H7B3I-EVAL board. How to choose memory size and type for customized board based on STM32H7 Platform. ? How to choose specific SOC form STM32H7 family suitable for project requirements? Please refer below details.  On‑Chip (SoC: STM32H7B3LIH6Q)Flash: 2 MB internal FlashRAM (SRAM): 1.4 MB internal SRAM (split across multiple banks: DTCM, AXI SRAM, SRAM1/2/3):package: On‑Board External MemoriesOcto‑SPI NOR Flash: 512 Mbit (64 MB)SDRAM: 8 Mbit × 32‑bit = 32 MBSRAM: 1 Mbit × 16‑bit = 2 MBNOR Flash: 8 Mbit × 16‑bit = 16 MBmicroSD card slots: 2 × (expandable storage)Memory used as per blow log while compiling and flashing code from Touch GFX. :desktop_computer:️ On‑Chip (STM32H7B3

I set ETH to be working on RMII_PTP_SYNCHRO, However HAL_ETH_USE_PTP is still not defined by default.

G4 ref man says there is 1 (one) FDCAN peripheral:Yet when editing the IOC file I see 2 (two) FDCAN peripherals:I believe the ref man. What's with the IOC file editor?

I am using the Analog Devices EVAL-ADE9430 Evaluation board for testing one of their devices. The Evaluation board uses the NUCLEO-144 STM32F413ZH processor. I am using the Keil uVision development setup to run and debug code.  I am specifically concentrating on the SPI Bus Driver and the timing. I have no previous experience with STM Devices and how the SPI transfers happen in the processor.   While walking through the code and following it on my scope to see the SPI Bus timing I am seeing something that does not make sense.  The AFERead32BitBuffer() function is called when you read a 32-bit register from the SPI Device which is an Analog Devices ADE9430 Chip (see Below).  The code calls HAL_SPI_Transmit() with the number of bytes it needs to transmit (see line 9 below). In this case it is transmitting a two byte command header where bits [15:04] are the register address and bits [3:0] is the R/W command, see example timing below.   When

Hey,I have my images stored compressed (ARGB8888) on NAND flash accessed via FileX. Not memory mapped, so I need to cache everything before starting the GUI.I noticed this in the Bitmap API docs:Bitmap::decompress — "This method is called by Bitmap::cache when required."So does that mean I just implement BlockCopy with FileX, call Bitmap::cache(), and it handles the decompression automatically? Does it allocate for the uncompressed size and deal with the temp buffers internally?Would save me a lot of headache if that's the case;Thanks!

Hello, I hope you are doing well.I am currently working on benchmarking the Ethernet communication interface on an STM32H753 Nucleo board.My setup involves sending data from a Python script to the STM32, where the data is encrypted, and then sent back. This allows me to measure the RTT and overall throughput.I initially used Mongoose, but I encountered several issues:With UDP, I cannot reliably send more than ~1500 bytes, since larger packets get fragmented or dropped.TCP works correctly, but the throughput varies significantly depending on payload size. For example:~2.7 MiB/s for 1400-byte payloads~7 MiB/s for 10240-byte payloadsI would like to know:What is the best networking stack or library for STM32 to achieve better performance and properly handle UDP large payloads?Given that Ethernet is 100 Mbps in my case, I am not reaching near-theoretical throughput even without encryption. Is this because I am measuring not only transmission time but also packet handling, buffering, and pro

Hi all,Hardware: Custom PCB, STM32H563ZGT6, USB powered.It was working fine but now gives me :Error: Cannot connect to access port 1!If you are trying to connect to a device with TrustZone enabled please try to connect with HotPlug mode. If you are trying to connect to a device which supports Debug Authentication with certificate or password, please open your device using it.Symptoms:- MCU gets hot to the touch within ~5–10 s of USB connect; cools instantly on unplug- VDD measures 3.29 V at the MCU pin- Chip is still functional: enumerates as STM32 Bootloader in DFU, ST-Link HotPlug connect succeeds, full erase + program + verify works- "Connect Under Reset" / normal connect frequently fails with Cannot connect to access port 1 or DEV_TARGET_NOT_HALTEDAlready tried:- Full chip erase via HotPlug → heat persists with empty flash- BOOT0 tied to VCC to force system memory bootloaderCan someone please assist me in resolving this issue?Thank You. 

Hello Community,I am working on a custom board using the STM32 MCU (STM32WLE5JCI6). I am configuring the ADC with two channels:PB1 → ADC_IN5PB3 → ADC_IN2I performed the following test cases and observed unexpected ADC behavior.Test Case 1Applied VDD+ to Channel 2 (ADC_IN2)Channel 5 (ADC_IN5) connected to GNDObservation:Both ADC channels are reading 4095, even though Channel 5 is tied to GND.Test Case 2Applied VDD+ to Channel 5 (ADC_IN5)Observation:Instead of getting 4095 on Channel 5, both channels are reading approximately 1500.I am also facing the same issue with another MCU: STM32L071KBT6TR.Development tools being used:STM32CubeIDE Version 2.1.0STM32CubeMX Version 6.8.0I have attached the main source file containing the ADC configuration for reference.Could anyone please help identify what might be causing this issue?Awaiting your valuable suggestions.Thanks.

Hello,I have been using the hrtim hardware on a prototype board with STM32G474RE and have noticed what might be a possible regression in CubeMX. Purpose:We are a group of students currently trying to develop FOC from scratch for controlling a BLDC-motor, this is a part of a bachelors thesis. As a part of developing the FOC we decided to use six-step commutation to start the motor before the FOC takes over. During the part of developing the commutation we have notice some strange behaviour between cubeMX versions.The problem:We are experiencing signal inversion with V6.17.0 of cubeMX with the exact same files pulled from the git repo. Either the migration fails for some reason or there is some sort of regression when it comes to the the configuration in CubeMX.6.16.1:HRTIM1 with slave-timers A,B,E are configured to output 6 PWM-signals with dead time configuration and complementary mode for CH2 of each timer.The output on the logic analyzer is as expected. It shows a duty cycle of

Hi All,  In my application, I am using the STM32L451RCT6 and trying to configure COMP2 with the internal Vref as a reference (specifically 3/4 Vref). For some reason, it never worked. I was only able to get it working when using DAC_CH1 or an external source as the reference. After a few days of troubleshooting and research, I finally found a relevant block diagram along with an important note in the reference manual (page 532). The thing is, there are no mentions or explanations of this behavior in the reference manual, datasheet, or errata other than this. Could you confirm whether the STM32L45x series actually supports using the internal Vref as a comparator reference or am I facing some other issue here? Thank you!   

I am using the Analog Devices EVAL-ADE9430 Evaluation board for testing one of their devices. The Evaluation board uses the NUCLEO-144 STM32F413ZH processor. I am using the Keil uVision development setup to run and debug code.  I am specifically concentrating on the SPI Bus Driver and the timing. I have no previous experience with STM Devices and how the SPI transfers happen in the processor. so I apologize a head of time. The Analog Devices ADE9430 uses a a 16-bit CRC (CRC-16-CCITT) and from what I originally read  the STM32F413ZH processor supports 32-Bit CRC (CRC-32-CCITT).  Diving deeper into the NUCLEO-144 STM32F413ZH processor manual section "29.4.2 CRC calculation" indicates "The SPI offers CRC8 or CRC16 calculation depending on the data format selected through the DFF bit." When the DFF bit (SPI_CR1 bit 11) is 0 it uses CRC8, when the DFF bit is '1' it uses CRC16.https://www.st.com/resource/en/reference_manual/rm0430-s

Hello, Can someone pls help me fill this information out for STM32H753VIH6? Thank you.      Model NameCheck Group１ (注１)２ (注２)３ (注３)４ (注５)Ministerial Ordinance Article Number第６条第一号イ第６条第一号ロ第６条第一号ハCheck ItemsPresence or Absence of Radiation-Hardened DesignDesign IntentRated Operating Temperature Range (°C) Whether or not compound semiconductors are used (Note 4)Maximum Clock Frequency (Note 4) (MHz)   Determination Criteria(i) Total Ionizing Dose: (Applicable) ≧ 5x10³ Gray (Si)(ii) Dose Rate: (Applicable) ≧ 5x10⁶ Gray (Si)/s(iii) Neutron Flux (1 MeV equivalent): (Applicable) ≧ 5x10¹³ (particles/cm²)Is it designed for civil automobiles or railway vehicles?(i) (Applicable) > 125°C(ii) (Applicable) < -55°C(iii) (Applicable) = -55 to 125°C(Applicable) = Formed from compound semiconductors(Applicable) > 40(Filling Example) ＡＢＣｘｘｘｘｘ－No0～85(Compound)30STM32H753VIH6          &nbs

I am having difficulties with initializing a SD Card.I am making use of the generated code to initialize the card:void MX_SDMMC1_SD_Init(void) I measured with a scope and I am getting 400KHz clock. All the pull-up resistors are correct and voltage is correct.Within the SD_PowerON() function, the function to send the MD8: SEND_IF_COND is called, but I get no response from the card. HAL Error Return is timeout.I tried a differ SD Card as well.Any suggestions where to start checking for potential issues?static uint32_t SD_PowerON(SD_HandleTypeDef *hsd) { __IO uint32_t count = 0U; uint32_t response = 0U; uint32_t validvoltage = 0U; uint32_t errorstate =0U; #if (USE_SD_TRANSCEIVER != 0U) uint32_t tickstart = HAL_GetTick(); #endif /* USE_SD_TRANSCEIVER */ /* CMD0: GO_IDLE_STATE */ errorstate = SDMMC_CmdGoIdleState(hsd->Instance); if (errorstate != HAL_SD_ERROR_NONE) { return errorstate; } /* CMD8: SEND_IF_COND: Command available only on V2.0 cards */ err

Hello,   ich set up my project with CubeMX for a CAN-FD (1 MBit/s / 4,8 MBit/s) and a Display for communication. Now i have the problem, that the SCK Signal for the communication looks more like a sawtooth signal than a rectangle. Also the SPI-Prescaler for the baud rate does not affect this signal. i am really confused. I need to use the 48 MHz HSE for my 4,8 MBit/s data phase for CAN-FD. I use an NUCLEO-C092RC and a LCD Display with ILI9341 (library from Mauro De Vecchi) Thanks for the help

Hello everyone,I'm using the stm32G0 USB Host with firmware package V1.6.3.There is an issue with H2D control transfers, where the USB Host stack send a second OUT packet before sending an IN packet on the last packet.I wrote a usb dfu host class that uses USBH_CtlReq.From this picture on the left we can see the PC sending a DNLOAD packet to the stm32h7, first the OUT packet followed by an IN packet.On the right we can see the stm32G0 host sending an OUT packet followed by another OUT packet, before sending an IN packet. The device here is the stm32f4, which for some odd reason allows this (every single stm I tried allows this except h7, tested stm: F4, F7, G0, H5, L5). So my update actually works on every single stm except on the stm32h7.But in the middle picture, the host is still stm32G0, but the device is an stm32h7, which after receiving the second OUT packets NAK's it.From the picture, I would say that the stm32h7 is in the right here. It see that it got an OUT packet, which

Hello. Please check if there are any issues with the settings as shown below. PB4 : SPI1_miso PB3 : SPI1_sck PD6 : SPI1_mosi   Thank you.

Hello,I have a custom board based on the STM32U5A5 microcontroller. I am trying to run a fingerprint reader sensor over USB on this board. For this project, I am using USBX Azure RTOS.The configurations I made on the CubeMX side are as follows:High Speed Clock: Crystal/Ceramic ResonatorLPUART1 for UART communication:Mode: AsynchronousBaudrate: 115200 Bits/sPB10 -> LPUART1_RXPB11 -> LPUART1_TXUSB_OTG_HS Mode and Configuration:Internal HS PHY -> Host OnlyPA11 -> USB_OTG_HS_DMPA12 -> USB_OTG_HS_DPActive_VBUS -> DisableNVIC Settings -> USB OTG HS Global Interrupt: EnabledPA9 GPIO Output enabled for USB power (I verified that the device is powered correctly.)THREADX Mode and Configuration:Core: EnabledUSBX:Core System -> EnabledUX Host HS -> Host CoreStack HS: EnabledHost Controllers HS: EnabledHID:Core: EnabledKeyboard: EnabledMouse: EnabledClock Configuration:OTG HS Clock Mux: PLL1P enabled and set to 24 MHz (I also tried 16 MHz)Project Manager:Toolchain: STM32C

Hi everyone. I have a problem with my U5A5ZJ-Q core board. The mounted microcontroller is STM32U5A5ZJT6QU. The project is to drive a QUECTEL em05 LTE modem. I need to configure the USB port exposed by PA11 and PA12 in Host mode. I am using the standard Host libraries in Middlewares and also the files in the USB_Host folder. I am trying to configure everything without success. I can't find exact written procedures to do this. Has anyone had problems? Has anyone tried? The problem is with the initialization of the USB Host port. It remains in reset mode and the CSRST bit never returns to 0. Below is a portion of the serial log that I printed on the monitor. " [CLK] Enabling HSI48...<CR><LF>[CLK] HSI48 RDY=1<CR><LF>[CLK] CLK48 <- HSI48 (via __HAL_RCC_CLK48_CONFIG)<CR><LF>[USBH] Init...<CR><LF>[LL] USBH_LL_Init (FS)<CR><LF>[HCD] Enter HAL_HCD_Init<CR><LF>[MSP] AFRH(GPIOA)=0x000AA770 AF_PA11=10 AF_PA12=10<CR>&l

Original post: https://community.st.com/t5/stm32-mcus-products/stm32h7-flash-crc/td-p/887279 Github: https://github.com/STMicroelectronics/stm32h7xx-hal-driver/blob/1501be883dae6f202c1d3f856ee6b11407dc257d/Src/stm32h7xx_hal_flash_ex.c#L733 HAL_StatusTypeDef HAL_FLASHEx_ComputeCRC(FLASH_CRCInitTypeDef *pCRCInit, uint32_t *CRC_Result) { ... ... FLASH->CRCCR1 |= FLASH_CRCCR_CLEAN_CRC | pCRCInit->BurstSize | pCRCInit->TypeCRC; ... ... }​|= will not program the expected burst size if the reset value is not b00. It looks like on reset the value is b01 (16 flash words). So if user try to set to burst size of 4 flash words (b00) it'll remain set to b01.

I am running the Analog Devices EVAL-ADE9430 board and noticed if I enable CRC checking reading 32 bit registers fail while 16-bit registers always pass. I trace it down to the  AFERead16BitBuffer() function not returning a status after reading the register over the SPI bus. This allows 16 bit register reads to work all the time while 32 Bit registers fail all the time (that's another story).   See line 12 below:     HAL_SPI_Receive(&hSPI, (uint8_t *)&pData[0], 2 * numSamples, SPI_TIMEOUT); uint32_t AFERead16BitBuffer(uint16_t addr, uint16_t numSamples, uint16_t *pData) { int32_t status = SYS_STATUS_SUCCESS; cmdBuffer[0] = (addr >> 4); cmdBuffer[1] = ((addr & 0x0F) << 4) + 8; HAL_GPIO_WritePin(GPIOD, GPIO_PIN_14, GPIO_PIN_RESET); status = HAL_SPI_Transmit(&hSPI, (uint8_t *)&cmdBuffer, 2, SPI_TIMEOUT); if (status == 0) { HAL_SPI_Receive(&hSPI, (uint8_t *)&pData[0], 2 * numSamples, SPI_TIMEOUT); } HAL_GPI

Hi, I'm developing a board to control motors using FOC. For this, I will use the MC workbench tool to generate the code. However, when I describe the hardware in the shunt resistors section, there is no "in-line" option, only the low-side option, but my board only has them in-line and I can no longer modify it. What can I do in the code to be able to use the shunt resistors in this way?

 Hi everyone,I wanted to share a project I’ve been building over the last few years. It’s called Mk, an operating system built entirely from scratch for the STM32F746G-DISCO and STM32F746G-Eval2 boards.These boards are powered by an ARM Cortex-M7 running at 216MHz. Initially, my goal was just to implement a small scheduler, but I stacked layers one after another to make it as complete as possible. Currently, I think I've added enough layers to claim it as a functional, lightweight OS.Mk features:A KernelPreemptive, priority-based multitasking scheduler (fixed-priority, O(1) selection via hardware CLZ instruction) Trusted Execution Environment (TEE) using the Cortex-M7 MPU (privileged and unprivileged mode isolation) Synchronization primitives: mutex, semaphore, event flags, mailbox Fixed-size memory pools Synchronous and asynchronous callback execution systemA Dynamic ELF Loader Mk can load and execute external .elf binaries at runtime, relocated dynamically into 64 KB pages of the ext

Hello,   I am working on I3C private transfers. When I build the context buffer with HAL_I3C_CTRL_BuildTransferCtxPrivate I get an assert when IS_I3C_PRIVATE_MODE is checked against HAL_I3C_PRIVATE_WITH_ARB_RESTART. Is the exclusion of HAL_I3C_PRIVATE_WITH_ARB_RESTART from the macro below intentional? stm32c5xx_hal_i3c.c: line 574 #define IS_I3C_PRIVATE_MODE(MODE) (((MODE) == HAL_I3C_PRIVATE_WITH_ARB_STOP) \ || ((MODE) == HAL_I3C_PRIVATE_WITHOUT_ARB_RESTART) \ || ((MODE) == HAL_I3C_PRIVATE_WITHOUT_ARB_STOP) \ || ((MODE) == HAL_I2C_PRIVATE_WITH_ARB_RESTART) \ || ((MODE) == HAL_I2C_PRIVATE_WITH_ARB_STOP) \ || ((MODE) == HAL_I2C_PRIVATE_WITHOUT_ARB_RESTART) \ || ((MODE) == HAL_I2C_PRIVATE_WITHOUT_ARB_STOP))  Thank you, -Gil

Hello, I am looking for an example of how to use private I3C transfers for STM32C562RE. I read the I3C examples posted on Github but I did not find any controller or target examples that use HAL_I3C_CTRL_Transfer_DMA and HAL_I3C_TGT_Receive_DMA for private transfers using HAL2. Your help would be appreciated,Gil

Recently, I was trying to implement SDMMC+DMA+SDFAT to read and write the SD card of my Class on the STM32H750VBT6. Then I found that the DMA of SDMMC was gone. I saw some online materials saying that MDMA needs to be configured, and some also said that SDMMC does not need to configure DMA as it has its own independent IDMA bus. What is the actual situation when it is directly mounted on AHB? Are there any configuration screenshots and programs of CubeMX for SDMMC+DMA? I'd like to refer to it. Thank you!