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Hi, Can I use DAC of STM32L476RCTX for audio application. I have to give output of DAC to MAX97220(Audio amplifier IC). Frequency range of audio is 10Hz to 20kHz. Can you please suggest any application note for this. Audio files will be fetched from SD card with SPI interface.Can you please suggest any code example or library that is already available for this type of example.  Regards,Anurag 

Hi ,I have a board that has a STM32H562xxx , I have 4 analog inputs mapped on ADC1 IN1, IN14, IN15 and IN18 single ended … ( PA1, PA2, PA3,PA4 ), TRGO TIM8 I have DCACHE1 disabled HAL_ADC_ConvHalfCpltCallback - gives a flag the cvt is completedI have a uint16_t dmaBuffer[4]When I run it the variable dmaBuffer[0..2] have values ~220 with small oscillations and only dmaBuffer[3]  with correct values from ADC1It’s the first time I used this board and 1st to have CACHE … otherwise I eventually disabled it.Can anyone help ? What info do I need to provide so I get little help make this work ?ThanksCristian 

I am using the STEVAL-25R300KA board with ST25PC-NFC version 3.0.2 on a PC running Windows 11.The software opens for a few seconds and then closes automatically by itself. I have already tried the following steps:Reinstalled the softwareRestarted my PCInstalled both x64 and x86 versions of the Microsoft Visual C++ Redistributable packagesChecked the Windows Event Viewer / Journal logs for any related errorsUnfortunately, none of these steps resolved the issue, and no specific error was detected in the logs.Could you please let me know what I can do to fix this problem and use the software properly?Thank you for your support.

Hello,I am working on the STM32MP257F-DK board and would like to use two Ethernet interfaces simultaneously for industrial network communication.The board provides:One onboard RJ45 Ethernet connector. One USB Type-C connector that, according to the documentation, can also provide Ethernet connectivity.My objective is to establish a network ring topology, where both Ethernet interfaces are connected to external devices using RJ45 Ethernet cables.I would like to understand:How can the USB Type-C Ethernet interface be converted to a standard RJ45 Ethernet connection? Does the USB Type-C port support Ethernet through a USB-to-Ethernet adapter (USB Ethernet dongle)? If yes, are there any ST-recommended USB-to-RJ45 adapters that have been validated with STM32MP257F-DK? Under Linux/OpenSTLinux, will the onboard RJ45 and the USB Ethernet adapter appear as two independent network interfaces (for example eth0 and eth1)? Has anyone implemented Ethernet ring topologies such as MRP, RSTP, PRP, or c

Hello,After the migration to the new Community Platform, I appear to have lost access to my previous community account.When I logged in today, I was unexpectedly asked to enter a nickname again. After doing so, I received the following email:"Your account is successfully activated."Since then:* My badges have disappeared.* My post history is empty.* Links to my previous topics redirect to the community home page. One example is my topic:VL53L1X returns 0x00 instead of 0xEA on PIC18F16Q41 hardware I2CThread ID: 901006The topic still appears in Google search results, including the title, replies, and accepted solution, but clicking the result redirects to the community home page.Could you please check whether my previous community account and content were properly migrated?Thank you for your help.Best regards,AndyO 

Hello ST Community,Before releasing the next revision of our prototype board, we would like to verify that the hardware implementation of the ST33KTPM2I is correct and that there are no hardware design issues.Currently, the ST33KTPM2I is implemented as an optional component on our board. Before modifying the board design, we would like to perform some basic functional checks to confirm that the device is operating properly.Our interface is SPI.Is there any recommended way to verify communication with the ST33KTPM2I? For example, is it possible to read a device ID register or any other status information to confirm that the device is responding correctly?We reviewed the datasheet, but it does not appear to provide details about accessible registers or a register map. Therefore, we are not sure what commands or procedures can be used to perform a basic hardware validation.Thank you very much for your support.Below is our hardware schematic:  

One of the AF options on SPI1 is to use the SWD debug pins PB3-PB5.How can this be used in reality?Pretty obviously you can't do SWD breakpoints when SPI1 is thus mapped!But assuming no SWD debugging is needed, and you use SWD just to program the FLASH, how does one implement this? AFAICT one would need - on SWD inputs, FLASH loading will work- on SWD outputs (e.g. SWO - the SWV ITM debug output), FLASH loading works because these pins power up in some mode suitable for SWD FLASH programming.Then when the code starts running, you will need some logic to disconnect the debugger, so the clock and data SPI signals can come out, without contention with the debugger.Maybe I am missing something obvious. Or maybe this SPI1 AF mapping option is intended for FLASH programming not via SWD but via a UART, CAN or the weird USB mode.PB3 may not need anything because the SPI CLK is an output and the SWD SWO signal is also an output  

I’ve noticed that when replying to a post that I had written a lot of text and added images. I expanded (red circle) the text area (blue area) to see everything. I needed to copy some text from the OP so I used the scroll bar (red rectangle) to view the first post.But as you can see in green, it’s just a small area that can be seen and that is all that is seen during scrolling. The edit textbox stays in place and doesn’t scroll. If i expand the edit textbox even further, all of the green area is totally out of frame.  

Hello everyone,Has anyone successfully used the "ST25R95 EMI FILTER CALCULATION.xlsm" spreadsheet?I'm currently trying to use it for tuning the matching network of an ST25R95 design, but it doesn't seem to work correctly on my side. As soon as I modify any parameter or use the reset function, all the graphs disappear and I can no longer obtain any meaningful results.At the moment, this tool would be very useful for optimizing the matching network, and without it I'm having some difficulties proceeding with the tuning process.Has anyone experienced the same issue? Is there a specific Excel version, macro setting, or workaround required to make the spreadsheet work properly?Any suggestions, advice, or alternative methods for tuning the matching network would be greatly appreciated.Thank you in advance for your help.Marco

I wanna implement Master and Slave ethercat protocol on stm32h7 series. Is there any examples available on subject?. Where should i start. Any resources?

HiI am implemented flash write protect on STM32U5 using option byte register FLASH_WRP2AR.Following these steps to write protect page 0x4C and 0x4D page in Bank 2- Unlock flash - Unlock Flash option register(FLASH_OPTR)- Unlock flash page by setting UNLOCK bit(31) in FLASH_WRP2AR- Write WRP2A_PSTRT[6:0] of  FLASH_WRP2AR with value 0x4C- Write WRP2A_PEND[[6:0] of  FLASH_WRP2AR with value 0x4D- Lock flash page by clearing UNLOCK bit(31) in FLASH_WRP2AR - Initiate option byte programming by setting OPTSTRT bit FLASH_NSCR register - Wait for flash operation to complete - Lock FLASH_OPTR register - Lock FlashThis sequence works some times , however most of the time  after option byte programming FLASH_WRP2AR value resets to following value and write protect is disabled. - WRP2A_PSTRT[6:0]: 0x7F - WRP2A_PEND[[6:0]: 0x00OPTWERR bit sets in FLASH_NSSR indicating that invalid configuration, however configuration looks right.Regards,Hareesha 

I need to use embedded STM32H573 bootloader to update customer application using UART1 or uart3.I try to use AN2606, but no success. May you provide correct code to jump from application to the embedded bootloader for specific processor model: STM32H573, please?

Added dual-core to title - may be significant ...Hello.I've tried rename my project in the past, and this always generate a lot of errors due to the dependencies.Which is the properly way?I am working with STM32H755. Yes, dual-core.Thanks!

The Data Brief for the STEVAL-CAM-M0I adapter board references the FH12-24S-0.5SH(55), which is a 24-pin connector. However, the cable pinout appears to be the usual 22 pins. Is this a mistake in the Data Brief, or is there something I'm overlooking?Data brief - STEVAL-CAM-M0I - P-Board: Hardware MIPI CSI-2 kit for the evaluation and integration of promodules on embedded processing platforms

Hello group,I'm a humble hardware guy integrating the LSM6DSV16X into a robotic application.We are going to use it in control loops, between 3kHz and 5kHz sampling.Between the main mode and the OIS mode, there are tons of ODR to choose from.However, is there a way to make the ADC sample at EXACTLY 5kHz?? Like a triggered or synced ODR?Or do I have to set the ODR at 7.68kHz and read the latest value from the FIFO and deal with the small discontinuities?I see the Triggered-ODR section 6.6 in the datasheet. Does it means enabling this will sync the ADC with an external INT2 pulses? Does the new values appears in the FIFO after a defined short delay?Thanks!

STM32CubeIDE 2.1.1: My program works if I choose the GCC compiler “none” optimization and it doesn’w work if I select any other optimization; anyone may help me ? Thank you

Hello,I am evaluating IIS3DWBG1/IIS3DWBG1TR and AIS25BA/AIS25BATR for a data acquisition system where sensor data timestamps need to be aligned with GNSS time.I would like to ask whether these devices support any GNSS-related time synchronization interface or equivalent mechanism, such as GNSS/GPS 1PPS or PPS input, UTC/NMEA time reference input, PTP/IEEE1588 synchronization, external sync input, external reference clock input, FSYNC/CLKIN/EXTCLK, or any pin/register mechanism that can reset, latch, align, or discipline the internal timestamp counter using an external timing signal.Based on my review of the publicly available ST documentation and product pages, IIS3DWBG1/IIS3DWBG1TR appear to provide an internal timestamp counter and FIFO timestamp function, but I have not found any clearly documented pin, register, or configuration mechanism to align this timestamp to GNSS 1PPS/PPS or UTC time.For AIS25BA/AIS25BATR, the publicly available documentation shows TDM interface signals such

Hello, I'm trying to convert a project to vscode the first error I incurred to was this one: I'm trying to convert to cmake using the extension a project for the STM32U585OIYXQ, when I load the source folder and set the output folder then i push on convert and this is the output that I get :   [Error] [ide-project-convert]:Generating project... [Error] [ide-project-convert]:The specified 'STM32U585OIYxQ' device is unknown [Error] [ide-project-convert]: Project conversion failed with exit code: 35. Which has been solved with this work around: "you can enable the stm32cube-ide-project-manager.conversion.ignoreMissingDevice VS Code setting".That went through and I have the following new error: [Info] [project-manager] STM32CubeIDE project manager activation.... [Info] [ide-project-convert] Starting project conversion... [Info] [ide-project-convert] cube wrapper version: 0.10.2 [Info] [ide-project-convert] Invoking STM32CubeIDE Eclipse exporter... [Info] [ide-proje

I am using a stm32h562agi6 and configured fdcan2. It works!But then I wanted to create a zephyr os project and saw that there the fdcan2 is not available for stm32h562xx in general. I did some investigations and also the datasheet actually states that fdcan2 is not available (features and peripheral counts). I basically read everywhere that it has only one fdcan peripheral. I use PB5 and PB6 which are only listed for FDCAN2.  So what is true now? Is it because it’s a UFBGA169?

Hi everyone I have a bit trouble initializing the JPEG peripheral on the N6. See the stack trace:  I feel like this has something to do with the RIF? I don’t know, this chip is very new to me. If anyone can help me, it’d be greatly appreciated. Best regards

Device A is an Ethernet implementation based on the STM32F107VCT6 microcontroller and the LAN9303 Ethernet transceiver. It connects to a host computer via a Layer 3 switch, with Device A and the host computer assigned IP addresses in different network segments.Two batches of STM32F107VCT6 microcontrollers are currently deployed. With the Layer 3 switch properly configured, the following test results are observed:For the older batch of STM32F107VCT6 devices, the host computer can successfully ping Device A, regardless of whether the Layer 3 switch is a Huawei or TP-LINK model. For the newer batch of STM32F107VCT6 devices, the host computer cannot ping Device A when using a Huawei Layer 3 switch; however, ping communication is successful when using a TP-LINK Layer 3 switch.The above observations indicate a batch-specific anomaly in the network functionality of the STM32F107VCT6. What is the specific root cause of this issue?Upon verification, the defective STM32F107VCT6 units have lot co

Hi,I am working with an STM32H7 microcontroller and the EVB-LAN9252-SPI board from Microchip Technology.I would like to establish communication between the STM32H7 MCU and the LAN9252 over the SPI interface. Could you please provide guidance on the hardware interfacing, software setup, and initialization procedure required to bring up the communication?Additionally, please let me know the software packages, drivers, middleware, or example projects that would be needed for this implementation.

Hi everyone,I am developing a custom board using an STM32U5 and the LSM6DSV16BX. I am using MEMS Studio to train and configure the Machine Learning Core (MLC), but I noticed that the generated .h configuration file seems to set INT1_MLC1 bit at MLC_INT1 register by default.Even though I haven't explicitly set up physical pin routing in my project, the exported C array includes bank-switching logic that forces this configuration. I see the following sequence in my generated header:  { .type = MEMS_CONF_OP_TYPE_WRITE, .address = 0x01, .data = 0x80 }, // Switch to Embedded Bank // ... [other configs] ... { .type = MEMS_CONF_OP_TYPE_WRITE, .address = 0x0D, .data = 0x01 }, // MLC_INT1: Route MLC1 to INT1 // ... [other configs] ... { .type = MEMS_CONF_OP_TYPE_WRITE, .address = 0x01, .data = 0x00 }, // Return to Main Bank Because of this, INT1 pin is firing on MLC state changes. Since this is a custom design, I need strict control over my interrupt routing.My questions are:Can s

When will the NUCLEO-C5A3ZG  be available via distributors?The st.com site lists it as available(mass production), but none of the distributors has listed it at all. And the estore lists it as coming soon. Do you have any more concrete dates, will it be available anytime soon?   Best

The “Others: Hardware and Software” forum has over ten thousand entries. That is a lot. IMO, it would make sense to have a separate forum for the STM8; that would make it easier to browse STM8 ports, and declutter the “Others: Hardware and Software” forum. The only thing about STM8 that is still there in the new forums is the “STM8 MCUs” tag. And apparently most existing posts about the STM8 don’t even have that tag.