STM32L151VE ADC in sequence reads higher value for the 1st rank

[Pavel Krupets]

ADC consistently reads higher value for any channel which is 1st in the sequence. If I query this channel 2nd time as rank 2 (immediately after high value) then it reads normal value. Value is high by about 10%.

Tested on stable input many-many times.

Is this normal?

[Uwe Bonnes]

It is normal if you use too small sampling times.

[Pavel Krupets]

Thank you!

It is a kind of interesting that while reading 24 channels in a sequence only 1st one gets it wrong. 🙂

[Pavel Krupets]

This also reproduces if I use 16 MHz ADC clock with 16 cycles sampling time (original problem had 4 cycles).

It is not a big deal though as sampling the same channel again fixes the problem.