Product forums

Dear forum,I am trying to setup a simple application to sample an ADC channel with DMA and stream it via UDP to a Windows PC, so here’s what I did:I started from the sample project “Nx_UDP_Echo_Client”, provided by ST in FW pack; I configured the ADC peripheral to sample pin PA1 as in the sample project “ADC_SingleConversion_TriggerTimer_DMA”, and this is ok; I configured the GPDMA channel 0 in circular mode to copy ADC.DR into a buffer, following this and this; I put the DMA buffer in a dedicated memory region (AHBSRAM1), as suggested here; I configured the buffer memory region as NON CACHEABLE in MPU configuration, as suggested here; Finally I configured the RISAF in order to let the GPDMA have access to the buffer, as suggested here.But still, when I try to activate the transfer with the HAL command HAL_ADC_Start_DMA, I get a “User setting error” (USEF bit in GPDMA_C0SR register) and the GPDMA channel is deactivated. Can you please help me in the debug?The project, which is attached

We are looking for Lowest Cost STM32 MCU with 32KB Flash and 12 KB RAM, 2 Uart, 1PWM, and 1 GPIO (No other requirments) for Mass Production requirement, Please help to choose.

Hello,When NetX Duo is used with IPv6 enabled, STM32CubeMX does not copy eight ND cache source files into the generated project, so the link fails.Environment:  - STM32CubeMX 6.18.0  - STM32Cube FW_H5 V1.7.0  - HW: STM32H573I-DK  - Middleware: ThreadX + NetX Duo, Ethernet interface, LAN8742 PHY  - NetX Duo settings: NX_DISABLE_IPV6 = false (FEATURE_NX_IPV6 = true), NX_ENABLE_IPV6_MULTICAST = true  - Toolchains tried: CMake and STM32CubeIDE (same result with both) These eight files are missing from Middlewares/ST/netxduo/common/src:    nx_nd_cache_add.c    nx_nd_cache_add_entry.c    nx_nd_cache_delete_internal.c    nx_nd_cache_fast_periodic_update.c    nx_nd_cache_find_entry.c    nx_nd_cache_find_entry_by_mac_addr.c    nx_nd_cache_interface_entries_delete.c    nx_nd_cache_slow_periodic_update.c Files that CubeMX does generate call them, so the link fails, e.g.:    in function `_nxd_icmp_enable': undefined reference to `_nx_nd_cache_fast_periodic_update'    in function `_nx_icmpv6_proces

I am trying to download the windows version of the IDE but I can't get it to work. Either the download button doesn't do anything or it's just not there. I've tried with different email accounts, different web browsers, different networks but that didn't do it. I've looked on here and it was suggested to disable browser extensions like ad-blockers and such and I've disabled all of them and still nothing. I would appreciate any help.

Environment- Board: B-U585I-IOT02A (STM32U585AIIXQ)- STM32CubeIDE, FreeRTOS (CubeMX-generated), CMSIS-RTOS v2- Driver: ST vendored HTS221 component driver (`hts221.c` / `hts221_reg.c`),  untouched, accessed through the public `stmdev_ctx_t` of the object layer- I2C2 @ standard mode, internal pull-ups, 1 Hz sampling in one-shot modeHi, application on the **B-U585I-IOT02A** discovery kit (STM32U585, FreeRTOS, STM32CubeIDE). The onboard HTS221 humidity/temperature sensor is driven by ST's vendored driver from BSP.Symptoms that i am experiencing: Right after reset (cold boot), the HTS221 reports **~20 °C, then over the following minutes of operation the reading rises steadily and settles at **~30 °C**, while the actual room temperature stays ~20 °C.The drift is smooth and monotonic (thermal-looking), not noisy or jumpy.I have already verified that BSP driver conversion formula is correct. Also HTS221 internal heater is disabled.My sensor configuration:HTS221_Set_One_Shot(&hts_obj);hts2

We are testing the STM32G0 native ROM bootloader over I2C using the Get Memory Checksum command (0xA1 / 0x5E).According to the protocol described in the ST AN4221 application note, after sending the memory address and size, the bootloader should return an ACK if they are valid. The CRC calculation then starts, during which the bootloader may return BUSY (0x76). Once the calculation is complete, the bootloader should directly return the 4-byte CRC result followed by its checksum.However, in our implementation, after the size ACK and waiting for the CRC computation, we are observing an additional ACK (0x79) before the CRC result.Our current sequence is:Command → ACK → Address → ACK → Size → ACK → CRC calculation → ACK → CRC resultBased on the sequence described in AN4221, we expected:Command → ACK → Address → ACK → Size → ACK → CRC calculation/BUSY → CRC resultCould you please confirm whether this additional ACK (0x79) after the CRC computation is expected behavior of the STM32G0 ROM boo

Hi forum,I’m tasked to implement firmware update ability for an STM32-based application. Basically, I’m using this tutorial and change it to work on a NUCLEO G431RB board. In the end, we’ll have a bootloader and two application slots in the STM’s flash.The situation now is this: Bootloader starts up, waits for a moment, checks for a condition (button pressed or not) and then transfers control to either application 0 or application 1. Both applications don’t do anything useful yet, they just differ in how they blink the one LED I’m able to manipulate easily.Startup works, transfer works but application 1 doesn’t blink at all. Reason is that its HAL_GetTick() value doesn’t change. In bootloader, it does. In application 0, it does also. And if I flash application 1 onto flash address 0x08000000 all alone without the other two, it works.And it also works if I change the marked line to initialize variable to zero.#define NumberOfFlashes 3static int _millisecondsUntilToggle = 5; // marked

  Hello,  We are designing a board with STM32N647X0H3Q (VFBGA264) and a 16-bit SDR SDRAM  (512 Mbit, x16, 3.3 V LVTTL) on the FMC, and we would like to run SDCLK at 133 MHz  and 166 MHz.  In DS14791 Rev 10, section "SDRAM waveforms and timings", the text says:    "In all timing tables, Tfmc_ker_ck is the fmc_ker_ck clock period, with primary     interfaces and RETIME = 1:     - Maximum FMC_CLK = 166 MHz at 20 pF for 2.7 V < VDD < 3.6 V     Otherwise:     - Maximum FMC_CLK = 75 MHz at 20 pF for 2.7 V < VDD < 3.6 V"  and Tables 86 to 89 have note 2: "Primary interfaces used."  However, I could not find a definition of "primary interfaces" anywhere in DS14791,  RM0486, AN5967 or ES0620, and the CubeMX device database shows no difference between  the alternative pins of the same FMC signal.  On VFBGA264, the control, address, SDCLK and NBL signals each have only one pin, but  every data line has two or three possible pins (all AF12), for example:    Signal    Option 1    Option

We use the VL53L4CD TOF inside a container which is either 390mm long or 260mm long. Our current process during manufacturing/testing is to perform the calibration procedure either using 390 or 260 depending on the container length. This is a manual process.I am looking for a way to automate this.  A way for the device to auto calibrate and auto determine its own length.  Or,  at the end of the day,  we are only interested in the delta between tof readings (items are placed into containers) and only need the 390 or 260 in order to calibrate so we can get an accurate delta.I gotta believe I am not the first to have this issue? The calibration procedure having to “know” the length creates issues in terms of manufacturing hundreds or thousands of bin.  Slows it all down.Any idea?Thanks,Will 

Hello ST Community,I am using a NUCLEO-H533RE board with STM32CubeH5 and STM32CubeProgrammer. I would like to clarify the correct procedure for programming firmware over ST-LINK/SWD with these boot configurations:STiRoT → Secure/Non-secure application STiRoT → OEMuRoT → Secure/Non-secure applicationMy current standalone STiRoT configuration was provisioned using the supplied scripts, with the final product state set to OPEN.When CN7 pins 5 and 7 are connected (BOOT0 tied to VDD), the application runs, but STM32CubeProgrammer cannot connect through SWD. It reports:I have tried the following settings:Port:        SWDFrequency:   400–1000 kHzMode:        Under ResetAccess port: 1Reset mode:  Hardware resetIf I remove the CN7 pin 5–7 jumper and power-cycle the board, SWD connection and programming work. After programming the signed/encrypted update image, I disconnect, power off, reconnect the jumper, and power on. The application then runs with the updated LED blinking behavior.Could you

Hi everyone, I have developed a custom pcb board and I want to use the usb and a uSD card. I am not really familiar with pcb designing. My guidance was some youtube videos in general, like the Phil’s Lab for the USB + SD MSC (The link, so there is some understanding on the code I have added to the usb app). The USB works. The SD only worked once somehow, while I was stepping the code in the debugging process. I could not do it again. I have tried every possible configuration. The only thing I get is the following from the terminal: [28067.786253] usb 3-4: new full-speed USB device number 86 using xhci_hcd[28067.913272] usb 3-4: New USB device found, idVendor=0483, idProduct=572a, bcdDevice= 2.00[28067.913281] usb 3-4: New USB device strings: Mfr=1, Product=2, SerialNumber=3[28067.913283] usb 3-4: Product: STM32 Mass Storage[28067.913286] usb 3-4: Manufacturer: STMicroelectronics[28067.913288] usb 3-4: SerialNumber: 395834673434[28067.916167] usb-storage 3-4:1.0: USB Mass Storage device

Hello everyone!   I got the following problem; I need to read from two 32bit addresses and write the data to three. Specifically, i am interested in the case shown in the left side of the image, where the N[0:15] increment by half word and write to the M[0:15] but it will increment by a full word. Don't worry about the reserved bytes in the HTIMx_CC1R, I checked the manual and are always at zero.  I saw that the H7 can read/write with weird patters using the fifo functionality. The thing is I can't understand at all how to set it up. Is there any other better way?   Thanks in advance!  

Hello everyone,I have an NUCLEO-H755I-Q with the following setup;i) A 50Hz PWM input pulse goes to HTIM1 in PWM input mode with DMA enabled in channel 2 so the moment CCR2 has captured some data they can be transferred,ii) HRTIMCHA2 with CMP1 enabled and; Period 40000 (the timer runs at 2MHz), Preload enabled, Channel A Update resets the timer counter, Set Source the period event and Reset Source the CMP1 event.So what I basically do is simply capture a PWM, make a DMA transfer in the negative edge of the input pulse to the shadow register of the HRTIMCHA2 CMP1 and forward it as output. So, theoretically, the only delay that should be added is only by how much time the hardware needs to do its things. And that, theoretically should be a constant value, since all the work is expected to be done by the HRTIMCHA2. I tried to measure the phase shift the input and output of H7 have by hooking them both in; 1) to a NUCLEO-G474RE and 2) with an oscilloscope. The G4 was just configured to

Hi, As mentioned in the other post that the drone frame is not symmetrical, where the propeller guards have fins with certain inclination and orientation (see [1]). I have difficultly to find the correct orientation of the drone02 frame. Since I am not quite sure how the propeller guards fins can affect the downward thrust that produces by the propellers. It would be great if someone can provide suggestion.  I enclosed two cases of the drone frame orientations as reference. NOTE: If I use Figure8 in [2] as reference, then Case1 does look correct. But taking the M2 propeller (top right of the propeller) as an example, the M2 propeller rotates counter-clockwise (CCW) direction, then I think the produced thrust will hit the guard fins and get affected?  Case 1  Case 2  Case 1: top right (for M2 motor/propeller)  Case 2: top right (for M2 motor/propeller)   Ref:[1] Steval-FCU001V2 FCU board and Steval-drone02 Drone kit issues[2] ST, How to build your own mini d

Why doesn't STM32Cube for VSCode have a code formatting feature? It clearly shows that “stm32cube clangd” is installed, but pressing Alt+Shift+S and selecting “Format” doesn't work. I'm using the Trae IDE. *This post has been translated from Chinese to comply with the ST Community guidelines (Article 10.2).

Hi everyone,I am currently working on repairing my NUCLEO-F767ZI board (Revision: [MB1137 Rev B]). The 3.3V LDO regulator (U6) was damaged and needs to be replaced.While working on it, I found a hardware discrepancy: According to the official schematic, U6 is specified as LD39050PU33R (a 6-pin DFN package). However, on my physical board, the PCB footprint for U6 clearly has 8 pads. The damaged original IC I removed is an 8-pin package with the marking code "PH 2kE". Since a 6-pin IC cannot fit on this 8-pin footprint, has anyone encountered this before? Could you please help me identify the correct 8-pin LDO part number to replace it?I have attached pictures of the physical 8-pin IC and the 8-pad PCB footprint for reference.Any advice would be greatly appreciated. Thanks in advance! Figure 1: The removed original 8-pin LDO IC with the marking code "PH 2kE".Figure 2: The physical 8-pad PCB footprint for U6 on the NUCLEO-F767ZI board. 

TouchGFX version 4.25.0 CubeMX version 6.17.4*  STMCubeIDE version 2.0.0*edited versionI created a development environment starting with TouchGFX and used Generate Under Root in CubeMX.  This did a great job of setting up the directory structure without links so that it is easier to navigate in the STM32CubeIDE application.Part of this process automagically moves the middleware and driver directories from the STM32CubeIDE directory to the root directory.When the .project file is created by the TouchGFX code generation it handles the movement of all these files and include directories like a champ, except the Properties=>C/C++ Build=>Settings=>MCU/MPU G++ Linker=>Libraries=>Library search path for the libtouchgfx-float-abi-hard.a library.It sets the path to "${workspace_loc:/STMCubeIDE/Middlewares/ST/touchgfx/lib/core/cortex_m7/gcc}" instead of "${workspace_loc:/${ProjName}/Middlewares/ST/touchgfx/lib/core/cortex_m7/gcc}"It's a quick fix to edit it to

​@Erwan SZYMANSKI, we are about to design a new hardware based on MP2.Is REV Y ETH1 port stable when used in RGMII mode?Is this config recommended?ETH1 in RGMII mode and ETH2 in RMII

This account only shares restored community content posted by members between May 22 and June 9, 2026, who did not register for the new community.Is there a function to get the currently set ID in the SVGImage widget?

Environment: TouchGFX 4.26.0, Windows, Ruby 3.0 (bundled MinGW env). Text database: texts.xml is 13.7 MB - 20 languages x 8,255 text entries = 165,100 translations. "remap": "yes" in application.config, binary translations and binary fonts both enabled for one of the passes. Symptom: make texts took ~181s cold on a developer machine, ~2min on our build server. Adding timing markers around each phase of Generator#run put 146s of it inside StringCollector#run. Cause: the fold that collects the translations, in framework/tools/textconvert/lib/string_collector.rb:    all_strings = Array.new(languages.count, Array.new)    text_entries.each do |text_entry|      text_entry.translations.each_with_index do |translation, lang_index|        all_strings[remap_global ? 0 : lang_index] += [translation]      end    end`a += [x]` allocates a new array and copies the whole accumulated contents on every iteration, so this is O(n^2) in the number of translations. With global remapping every language fold

TouchGFX 4.26.0Low severity bug. Only visual in Designer. In the generated code the correct alignment is used.Steps to reproduce:create TextArea. Disable “auto-size” Set textID with text element that has right alignment. The shown alignment is still left aligned.When Designer is restarted, the correct alignment is shown again.

TouchGFX version: 4.26.0Visual Studio version: 18.6.3When TouchGFX generates or updates the “TouchGFX/simulator/msvs/Application.vcxproj” file it creates lines with<ClCompile Include="path/to/some/file.cpp"/>but Visual Studio updates the lines to <ClCompile Include="path/to/some/file.cpp" />. Notice the extra space. This means that in version control sometimes commits will be added without the space and sometimes with the space. This overcomplicates merges and causes merge requests. Please update the XML library or fix the output to be consistent with Visual Studio.

How to use EDATA as extended flash in STM32-C562RE?I disabled the EDATA_ENVerified CubeProgrammer can read 0x08400000Created a project from MX2Added EDATA_CODE (rx) in stm32c562xe_flash.ld in memory block as EDATA_CODE (rx)  : org = 0x08400000, len = 0x10000Added the following section:           .edata_code :            {                    . = ALIGN(16);                    KEEP(*(.edata_code))                   KEEP(*(.edata_code.*))                    . = ALIGN(16);            } > EDATA_CODEAdded the simple EDATA_Add() function in main:__attribute__((section(".edata_code")))            __attribute__((noinline))            uint32_t EDATA_Add(uint32_t a, uint32_t b)            {                    return a + b;            }Called it once from main()Build it and build was successfullBefore flashing, check the .map lines containing .edata_code and EDATA_Add and foundsomething similar to:            .edata_code    0x08400000 ...                                 0x08400000 EDATA_AddNow,

This is a small feature request to fix an annoying quirk of the TouchGFX Designer.When opening the texts menu in the designer, all of the texts groups are expanded by default. In projects with many texts/groups, its tedious to collapse all of the groups or scroll to the bottom of the expanded groups. I think it would be better if either TGFX stored the state of the groups expansion OR collapsed them all by default.

I have this hardware. X_NUCLEO-53L9A1 and Nucleo-H563ZI. I installed the drivers and flashed GrabRel binary into the STM32H5. I open Jarv3D but No hardware detected.