DS13565 Rev 2 says under 3.20: "The embedded USB controller cannot be used on STM32G0B0KE as this device does not provide an HSE oscillator input.". Well, sounds reasonable. But same DS says in Table 11 for Pin 2 (LQFP32) PC14: "OSC32_IN, OSC_IN" whe...
RM0444 rev. 5, sec. 29.3.4 and RM0490 rev. 3, sec. 21.3.4 both employ only WDGTB[1:0], but WWDG_CFR description mentions WDGTB[2:0] with eight different prescaler settings. So actually two or three bits?
What's the difference between "LQFP32" and "LQFP 32 7x7x1.4mm"? Probably they both refer to the very same package?. A similar discrepancy appears for a lot of other packages, too. (For WLCSP it's a different matter.)
The zip-archive en.st-stm32cubeide_1.9.0_12015_20220302_0855_amd64.rpm_bundle.sh_v1.9.0.zip is apparently broken: "inflating: st-stm32cubeide_1.9.0_12015_20220302_0855_amd64.rpm_bundle.sh bad CRC dd12447e (should be c287de8a)"
The "flash lock" and "flash unlock" commands just lock/unlock the FLASH_CR register. That's unrelated to RDP setting. You need (see OpenOCD docs, don't worry about the stm32l4x, this works for the g0xx as well):Command: stm32l4x option_write num reg_...
You did realize that the flash device is a two-stacked die device, didn't you? I've always resisted to use these devices as the handling is prone to cause difficulties: the handling of inter-die communication varies across manufacturers and is someti...
Although the F4 and F6 are the same die, the F4 has only 16 kByte of flash - officially. The extra 16 kByte might not be tested, might even be defective or slightly out of specs. Some tools might allow use of the extra flash, others might strictly st...
And RST is SWIM reset, not SWD reset signal. Moreover there are clones around which have totally weird pull-up/pull-downs on SWDIO and/or SWCLK. Causes communication to target to cease sporadically:https://www.mikrocontroller.net/topic/515218Probably...
