2021-10-18 11:43 AM
Hi,
I am running Capture Mode at TIM2 channel 1. My CubeMx configuration below. I am getting CCR1 value correctly but i checked at debugger mode, CCR2 value is always 0. Thus i can't measure duty. What's the problem ?
Solved! Go to Solution.
2021-10-18 02:58 PM
> At F0/SPL code Timer2-Channel2 is disable too
No, it is not. It may be not apparent at the first sight, but the code above calls TIM_PWMIConfig() function which sets *both* CH1 and CH2. SPL is open source, read it.
JW
2021-10-18 12:08 PM
In that screenshot, Channel2 shows Disable, so it does not capture.
JW
2021-10-18 01:01 PM
I am trying convert legacy SPL code to HAL. It was written for F091 at 48MHz.Legacy code below.
I working on L072RB at 32Mhz.
void Config_PulseInputFreqEnable(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
TIM_ICInitTypeDef TIM_ICInitStructure;
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
NVIC_InitTypeDef NVIC_InitStructure;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_Init(GPIOA, &GPIO_InitStructure);
GPIO_PinAFConfig(GPIOA, GPIO_PinSource5, GPIO_AF_2);
/* ---------------------------------------------------
TIM2 Configuration :PWM Input
TIM2 input clock (TIM2CLK) is set to APB1 clock (PCLK1)
TIM2CLK = PCLK1 => TIM2CLK = HCLK = SystemCoreClock
----------------------------------------------------------------------- */
/* TIM2 Periph clock enable */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
/* TIM2 Configuration */
TIM_DeInit(TIM2);
/* Time base configuration */
TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.TIM_Prescaler = (SystemCoreClock / 1000000) - 1; // 1 MHz, from 48 MHz
TIM_TimeBaseStructure.TIM_Period = 0xFFFFFFFF; // Maximal, TIM2 is 32-bit counter
TIM_TimeBaseStructure.TIM_ClockDivision = 0x0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure);
TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Rising; // Rising/Falling/BothEdge
TIM_ICInitStructure.TIM_ICSelection = TIM_ICSelection_DirectTI;
TIM_ICInitStructure.TIM_ICPrescaler = TIM_ICPSC_DIV1;
TIM_ICInitStructure.TIM_ICFilter = 0x0;
TIM_ICInitStructure.TIM_Channel = TIM_Channel_1;
TIM_PWMIConfig(TIM2, &TIM_ICInitStructure);
/* Select the TIM2 Input Trigger: TI1FP1 */
TIM_SelectInputTrigger(TIM2, TIM_TS_TI1FP1);
/* Select the slave Mode: Reset Mode */
TIM_SelectSlaveMode(TIM2, TIM_SlaveMode_Reset);
TIM_SelectMasterSlaveMode(TIM2,TIM_MasterSlaveMode_Enable);
/* TIM enable counter */
TIM_Cmd(TIM2, ENABLE);
TIM_ITConfig(TIM2, TIM_IT_Update, ENABLE);
/* Enable and set TIM2 Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPriority = 0x00;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
After that some calculation at below.
PulsePeriod = TIM2->CCR1;
PulseDuty = TIM2->CCR2;
PulseRemain = TIM2->ARR - TIM2->CNT;
ExtPulseFreq = 10000000/PulsePeriod;
ExtPulseDuty = PulseDuty * 1000 / PulsePeriod;
I observe this code at debugger mode with F0 (SPL Code), there is a CCR2 value. But I observe at L0 (HAL Code) CCR2 value is 0.
Am i missing something ?
By the way JW thank you so much for your helping.
2021-10-18 01:17 PM
If the L0/HAL code is the one not working, why are you showing the working F0/SPL code? How will that help? Did you fix the problem that JW pointed out?
2021-10-18 01:32 PM
Because i just want to be ensure that converting is correct. But maybe i have a mistake. At F0/SPL code Timer2-Channel2 is disable too but there ise CCR2 value. But at L0/HAL code there is no CCR2 value. I just want to know do i have a mistake anywhere?
I also don't understand why you're so angry.
2021-10-18 02:58 PM
> At F0/SPL code Timer2-Channel2 is disable too
No, it is not. It may be not apparent at the first sight, but the code above calls TIM_PWMIConfig() function which sets *both* CH1 and CH2. SPL is open source, read it.
JW
2021-10-20 02:05 AM
Thank you JW. I review this function and i found solution described as below. Now CCR2 is works.