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STM32H563: Not able to set NVIC priorities properly for HDMA & SPI

PFlor.2
Senior

See attached .ioc

Tried to change LIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY from 5 to 1 in the FreeRTOS settings, but didn't seem to allow me to lower the priority levels in NVIC settings.

1 ACCEPTED SOLUTION

Accepted Solutions

Turns out there was a problem introduced that caused the FreeRTOS kernel not to run correctly which seems to be blocking the interrupts.

I believe when FreeRTOS is used it reserves priority level below 5 except systimer, so all other interrupts must use priority 5 or above.

Once the FreeRTOS issue was resolved the SPI/DMA transfer worked as expected with SPI priority set to 5 and DMA set to 6

View solution in original post

4 REPLIES 4
Amel NASRI
ST Employee

This is a follow-up of the discussion STM32H563 and SPI DMA Transfer issue. Current issue is related to STM32CubeMX @Semer CHERNI .

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

Semer CHERNI
ST Employee

Hello @PFlor.2 

First let me thank you for posting.

Could you provide more details about which priority level you are not able to modify.
Share screenshots if possible.

KR,
Semer.

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

Pretty much any of the peripheral priority levels in the NVIC settings except the TimeBase which is using Timer6, it is set to priority 0 but all others cannot be set lower than 5 in .ioc NVIC settings.  Thought maybe it had something to do with using FreeRTOS.

PFlor2_0-1732723779714.png

 

Turns out there was a problem introduced that caused the FreeRTOS kernel not to run correctly which seems to be blocking the interrupts.

I believe when FreeRTOS is used it reserves priority level below 5 except systimer, so all other interrupts must use priority 5 or above.

Once the FreeRTOS issue was resolved the SPI/DMA transfer worked as expected with SPI priority set to 5 and DMA set to 6