STM32H563: Not able to set NVIC priorities properly for HDMA & SPI
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‎2024-11-26 7:07 AM - last edited on ‎2024-11-27 12:14 AM by Amel NASRI
See attached .ioc
Tried to change LIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY from 5 to 1 in the FreeRTOS settings, but didn't seem to allow me to lower the priority levels in NVIC settings.
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STM32CubeMX
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STM32H5 Series
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‎2024-12-06 7:21 AM
Turns out there was a problem introduced that caused the FreeRTOS kernel not to run correctly which seems to be blocking the interrupts.
I believe when FreeRTOS is used it reserves priority level below 5 except systimer, so all other interrupts must use priority 5 or above.
Once the FreeRTOS issue was resolved the SPI/DMA transfer worked as expected with SPI priority set to 5 and DMA set to 6
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‎2024-11-27 12:17 AM
This is a follow-up of the discussion STM32H563 and SPI DMA Transfer issue. Current issue is related to STM32CubeMX @Semer CHERNI .
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‎2024-11-27 2:33 AM
Hello @PFlor.2
First let me thank you for posting.
Could you provide more details about which priority level you are not able to modify.
Share screenshots if possible.
KR,
Semer.
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‎2024-11-27 8:13 AM
Pretty much any of the peripheral priority levels in the NVIC settings except the TimeBase which is using Timer6, it is set to priority 0 but all others cannot be set lower than 5 in .ioc NVIC settings. Thought maybe it had something to do with using FreeRTOS.
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‎2024-12-06 7:21 AM
Turns out there was a problem introduced that caused the FreeRTOS kernel not to run correctly which seems to be blocking the interrupts.
I believe when FreeRTOS is used it reserves priority level below 5 except systimer, so all other interrupts must use priority 5 or above.
Once the FreeRTOS issue was resolved the SPI/DMA transfer worked as expected with SPI priority set to 5 and DMA set to 6
