To reproduce: generate a project using ADC3 with the LL driver on STM32CubeMX 6.0.1.
Issue: regardless of which ADC is used, this shows up in MX_ADCx_Init():
/* Disable ADC deep power down (enabled by default after reset state) */
LL_ADC_DisableDeepPowerDown(ADC1);
/* Enable ADC internal voltage regulator */
LL_ADC_EnableInternalRegulator(ADC1);
The issue appears to stem from db/mcu/config/llConfig/ADC-STM32G4xx_LLConfigs.xml:
<CallLibMethod Name="" Type="HardCode">
<HardCode Text="
#n#t/* Disable ADC deep power down (enabled by default after reset state) */
#n#tLL_ADC_DisableDeepPowerDown(ADC1);
#n#t/* Enable ADC internal voltage regulator */
#n#tLL_ADC_EnableInternalRegulator(ADC1);
#n#t/* Delay for ADC internal voltage regulator stabilization. */
#n#t/* Compute number of CPU cycles to wait for, from delay in us. */
#n#t/* Note: Variable divided by 2 to compensate partially */
#n#t/* CPU processing cycles (depends on compilation optimization). */
#n#t/* Note: If system core clock frequency is below 200kHz, wait time */
#n#t/* is only a few CPU processing cycles. */
#n#tuint32_t wait_loop_index;
#n#twait_loop_index = ((LL_ADC_DELAY_INTERNAL_REGUL_STAB_US * (SystemCoreClock / (100000 * 2))) / 10);
#n#twhile(wait_loop_index != 0)
#n#t{
#n#t#twait_loop_index--;
#n#t}"
/>
</CallLibMethod>
It appears that ADC1 is hard-coded into the config XML file. I have to manually edit the code to ADC3 after generation to fix this issue.
