Hello,
I am using a STM32H745ZI in a project and have USART1 configured as a UART. I updated STM32CubeMX to version 6.2.0 today and the clock page is telling me that "USART1,6 clock source frequency must be <= 75 MHz", as per image attached.
Earlier versions have not given me this error.
I know, I can ignore the error and generate the code anyway.
The only place where I think this can come from is as follows. I am using VOS2, and in the device specific datasheet DS12923, table 23 on page 111 says that the maximum APB clock frequency in VOS2 is 75 MHz.
Firstly, I think this is a bug in CubeMX because RM0399 states on page 2197 that "There is no constraint between usart_pclk and usart_ker_ck: usart_ker_ck can be faster or slower than usart_pclk. The only limitation is the software ability to manage the communication fast enough.". I cannot find any documentation that says USART1 kernel clock must be limited to 75 MHz.
Secondly it got me wondering, how stringent that table is to a maximum limit - it's not in the "Absolute maximum limits" section of the document. The table 23 just seems to be taking the maxmimum core frequencies and then setting the dividers so it comes into the allowed range (e.g. maximum CPU1 clock at 300MHz then the dividers need to be set so that APB clock comes out to 75 MHz). In my case I have CPU1 clock at 200 MHz and the dividers allow me to set 100 MHz on e.g. APB. And it has been "working" in that configuration for the last year. But now I'm curious, if I am violating the maximum APB frequency, what do I need to look out for in terms of problems? Excessive junction temperature? Excess current draw from SMPS, causing a brownout? Wouldn't those be offset by the lower CPU frequencies? Are those just the operating conditions used to evaluate the peripheral performace in the sections that follow?
Thanks for any insights.
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