2024-08-18 01:30 PM
Hi
I’m using CubeMX 6.12.0 with a STM32U5G7VJT6Q project.
When using a fractional divider setting for PLL3 (in the RCC System Clock configuration), CubeMX generates the below LL library code.
The LL_RCC_PLL3FRACN_Enable() is correctly included, but it seems the fractional divider line (e.g. LL_RCC_PLL3_SetFRACN(1024)) is missing from the generated code.
When switching to HAL it is included correctly.
void PeriphCommonClock_Config(void)
{
LL_RCC_PLL3_ConfigDomain_HSPI_LTDC(LL_RCC_PLL3SOURCE_HSE, 1, 9, 5);
LL_RCC_PLL3_EnableDomain_HSPI_LTDC();
LL_RCC_PLL3_SetVCOInputRange(LL_RCC_PLLINPUTRANGE_8_16);
LL_RCC_PLL3_Enable();
/* Wait till PLL3 is ready */
while(LL_RCC_PLL3_IsReady() != 1)
{
}
LL_RCC_PLL3FRACN_Enable();
}
2024-08-18 02:23 PM
Hello @decalvus
Could you please add your .ioc file so we can be able to test you case.
Best Regards.
STTwo-32
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2024-08-18 02:37 PM