Does STM32H745ZI(LQFP144) FMC support external SDRAM or SRAM? (not PSRAM).

[EOzde.1]

Hi,

In CUBEMX with LQFP144, there is no configuration for both SRAM and SDRAM? But with other packets (LQFP176, LQFP208) there is a configuration like SDRAM1, SDRAM2, SRAM. Is it not possible with the LQFP144 or if I configure the parameters directly from the code, would it works? Because I believe all packets have the same properties except the pin numbers. 

Thank you.

[EOzde.1]

Thank you, man. Those are very important points for every developer out there. I really appreciate it.

[Alex - APMemory]

In case you can't solve your issue with SDRAM or SRAM on FMC, you may want to consider QSPI PSRAM for low pin count memory (16Mb, 64Mb, 128Mb). I so, you need to know there are a limitation as this is a NOR Memory controller and Memory Mapped Write is not available.

Alex

[Harvey White]

There is another alternative, that I just discovered. There's a dynamic memory, QSPI, automatic refreshing. At Mouser (for the US) the chip is APS6404L-3SQR-SN. It runs about 1.74 each, quantity 1. I plan to get some and I do have some boards where it would fit immediately. it's a 64Mbit memory organized as 8 megs * 8. Not the ideal mapping, but possible and certainly ought to give you more memory.

The QSPI memory (or a mode on OCTOSPI) is supposed to be memory mapped, which is half the battle. It Not sure if it has a dual mode, it may not. It's worth a try, especially since I already have space on a board for one.

The difference here is that I haven't found any of the other technologies to be reasonably priced. This seems to be quite reasonable.

I think that the FMC allows (or can allow) QSPI memory to be written.

Different incarnations of the ST chip have different FMC controllers.

[Alex - APMemory]

fyi, you can also get 16Mb density (APS1604M-...3V/1.8V, SOP8/USON8) and soon 128Mb (APS12804O-...only 1.8V WLCSP). Dual-quad mode is usualy available.

Main point to have in mind is that NOR QSPI controller doesn't support Memory Mapped Write.

For MCU version supporting OCTOSPI, then you have a much wider choice upon needs such as:

• OPI from 64Mb to 512Mb in BGA24 or WLCSP (APS6408L, APS12808…, APS25608N…, APS51208N…)
• QSPI DDR 128Mb WLCSP (APS12804O-DQ-WA)
• QSPI SDR 16Mb to 128Mb, SOP8/USON8/WLCSP (APS1604M-…, APS6404L-…, APS12804O-…)

Alex

[Harvey White]

Then that's the answer for the memory controller. I'll have to look at the various chips I use and see whether or not the chip has OCTOSPI.

The cost difference between the 16MB and the 64MB is about 20 cents in unit lots. I'll go with the 64MB. Since I populate my own boards, I don't use BGA (at all), and I prefer chips with legs. So SOP8 is the preferred way to go.

[Harvey White]

The F446 has an older style QSPI controller, and does not permit writes to the memory mapped QSPI chip. The F767 makes no mention of the limitation (of writing to the memory, and mentions sending and receiving packets to the chip). I'm going to presume that the chip works in this mode.

The chip I mentioned: A6404L, has only two modes, SPI and QSPI. The datasheet does not mention Dual SPI at all.

As a design point, if you design your own board layout (and don't use a Nucleo board or equivalent where the pins are preassigned), the default pin assignments in CubeMxIDE are not always the best ones. For QSPI, you'd want all the pins next to each other for ease in layout. Alternate pin assignments may be needed. For SPI, this is particularly true. Control pins for USART connections are similar.