2017-10-17 03:08 AM
When using CubeMX, with STM32L476, for setting LSE drive capability other than 'Low Drive' the setting will not be implemented. This is due to the fact that the write access using bit DBP in PWR->CR1 is not set prior to setting RCC->BDCR value.
The code generated in SystemClock_Config is:
void SystemClock_Config(void)
{RCC_OscInitTypeDef RCC_OscInitStruct;
RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_PeriphCLKInitTypeDef PeriphClkInit;/**Configure LSE Drive Capability
*/ __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);/**Initializes the CPU, AHB and APB busses clocks
*/ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE|RCC_OSCILLATORTYPE_MSI; RCC_OscInitStruct.LSEState = RCC_LSE_ON; RCC_OscInitStruct.MSIState = RCC_MSI_ON;....}
where HAL_PWR_EnableBkUpAccess must be executed prior to
__HAL_RCC_LSEDRIVE_CONFIG
#cubemx #lseSolved! Go to Solution.
2018-03-20 09:42 AM
Hi
Ofri.Igal
,This issue is now fixed in the current CubeMX release.
Please, upgrade with CubeMX4.25 if not already done.
BR. Jeanne
2017-10-17 06:50 AM
Dear
Ofri.Igal
,Are you using the last CubeMX version ? if no please use the latest.
If this issue persist with the 4.1 version please tell us.
-Nesrine-
2017-10-17 12:16 PM
Mine is 4.22.0, downloading the new version now and I will update
2017-10-17 12:38 PM
Same problem in 4.22.1
Also, the function that come later, HAL_RCC_OscConfig, does set the
DBP bit, but never clears it at the end, so the access is permitted until the next reset and it doesn't make sense.
2018-02-06 07:55 AM
Hi
Sorry for my late answer.
However, on top of CubeMX4.24, I can't see the issue you reported.
__HAL_RCC_LSEDRIVE_CONFIG took the parameter enter in the RCC configuration tab (even if LSE Drive Capability is set to a value other than LSE oscillator low drive capability).
If you still see this issue with the current CubeMX release, could you please send me your ioc in order that I analyze it in depth?
Thanks in advance. Jeanne
2018-02-07 01:14 AM
The problem doesn't occur when using
using the LL driver in
CubeMX4.24 (STM32Cube_FW_L4_V1.11.0)
It still happens when using HAL driver, here is the code of
SystemClock_Config from cube, the first instruction is __HAL_RCC_LSEDRIVE_CONFIG before enabling
DBP in PWR->CR1
void SystemClock_Config(void)
{RCC_OscInitTypeDef RCC_OscInitStruct;
RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_PeriphCLKInitTypeDef PeriphClkInit;/**Configure LSE Drive Capability
*/ __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_MEDIUMLOW);.
.
.
.
I have no idea how to attach you the ioc file :-)
2018-02-08 12:44 AM
Hi
Ofri.Igal
,To insert your ioc file, please, click on 'insert image' button even if it is an ioc file (it won't check the extension type).
BR. Jeanne
2018-02-08 01:03 AM
Hi
Ofri.Igal
again,It seems that this issue has just been seen by our development team. I will get back to you as soon as the correction is available.
BR. Jeanne
2018-03-20 09:42 AM
Hi
Ofri.Igal
,This issue is now fixed in the current CubeMX release.
Please, upgrade with CubeMX4.25 if not already done.
BR. Jeanne