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Does STM32MP153 and STM32MP157 support ECC for RAM interface ( DDR3)?

ABala.7
Associate
 
1 ACCEPTED SOLUTION

Accepted Solutions
Alex - APMemory
Senior II

Hi, 

I'd like to comment about ECC DDR3. This device can be used with standard SoC. 

Please see below example based on Zentel Japan PN A3T4GF40CBF, 4Gb Built-in ECC DDR3/DDR3L SDRAM:

The ECC is a built-in function, the product has the features listed below

  • /DED (Double bit Error Detection) pin sends a fault detection signal to notify SoC of memory data error
  • Compatible with conventional JEDEC standard DRAM;
  • /DED pin is connected or unconnected does not affect ECC function;
  • /DED pin state or level does not affect ECC function
  • Note : Use Burst Chop and Data Mask may restrict the ECC functionality

Note:

  • /DED pin should be terminated at the VTTD and will be output low level when DED occurs.
  • If you do not use the DED notification, please fix /DED to VSS or OPEN.

AlexAPMemory_0-1697018807460.png

Alex

 

View solution in original post

2 REPLIES 2
PatrickF
ST Employee

Hi @ABala.7​ 

There is no support of DDR ECC on STM32MP1 products.

Regards,

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Alex - APMemory
Senior II

Hi, 

I'd like to comment about ECC DDR3. This device can be used with standard SoC. 

Please see below example based on Zentel Japan PN A3T4GF40CBF, 4Gb Built-in ECC DDR3/DDR3L SDRAM:

The ECC is a built-in function, the product has the features listed below

  • /DED (Double bit Error Detection) pin sends a fault detection signal to notify SoC of memory data error
  • Compatible with conventional JEDEC standard DRAM;
  • /DED pin is connected or unconnected does not affect ECC function;
  • /DED pin state or level does not affect ECC function
  • Note : Use Burst Chop and Data Mask may restrict the ECC functionality

Note:

  • /DED pin should be terminated at the VTTD and will be output low level when DED occurs.
  • If you do not use the DED notification, please fix /DED to VSS or OPEN.

AlexAPMemory_0-1697018807460.png

Alex